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NCV7428D1L3R2G Datasheet(PDF) 5 Page - ON Semiconductor

Part # NCV7428D1L3R2G
Description  System Basis Chip with Integrated LIN and Voltage Regulator
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCV7428D1L3R2G Datasheet(HTML) 5 Page - ON Semiconductor

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5
Definitions
The characteristics defined in this section are guaranteed within the operating ranges listed in Table 4, unless stated
otherwise. All voltages are referenced to GND (Pin 3). Positive currents flow into the respective pin.
Table 6. DC CHARACTERISTICS (VS = 5.5 V to 28 V; TJ = −40°C to +150°C; Bus Load = 500 W (VS to LIN); unless otherwise
specified. Typical values are given at VS = 12 V and TJ = 25°C, unless otherwise specified.)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
SUPPLY MONITORING
VS_PORH
VS threshold for the power−up
of the circuit
VS rising
3.3
4
V
VS_PORL
VS threshold for the Shutdown
of the circuit
VS falling
2.2
3
V
VOUT_RES_5
VOUT monitoring threshold
NV7428−5
VOUT falling
4.55
4.75
V
VOUT_RES_33
VOUT monitoring threshold
NV7428−3
VOUT falling
2.97
3.135
V
VOUT_RES_hys5
VOUT monitoring threshold
hysteresis for NV7428−5
0.1
V
VOUT_RES_hys33
VOUT monitoring threshold
hysteresis for NV7428−3
0.06
V
CURRENT CONSUMPTION
IVS_LIN_Active_rec
VS supply current
LIN Active, LIN bus recessive
1.8
mA
IVS_LIN_Wakeup
VS supply current (Note 8)
Standby mode; LIN Wakeup,
LIN bus recessive; IVOUT = 0 mA
VS = 13.5 V, TJ < 105°C
25
40
mA
IVS_Sleep
VS supply current (Note 8)
Sleep mode; LIN Wakeup, LIN bus
recessive; VOUT off, VOUT < 0.5 V
VS = 13.5 V, TJ < 105°C
12
25
mA
VOUT REGULATOR
VOUT_5
VOUT regulator output voltage
(Note 6)
VOUT regulator active,
0 < IVOUT < 70 mA, Static
regulation, VS = 5.5 V to 28 V
4.9
5
5.1
V
VOUT_33
VOUT regulator output voltage
(Note 6)
VOUT regulator active,
0 < IVOUT < 70 mA, Static
regulation, VS = 4.5 V to 28 V
3.234
3.3
3.366
V
VOUT_5_EMC
VOUT regulator output voltage
under EMC (Note 8)
DPI EMC test applied to LIN pin.
No bus capacitor. SOIC8 package;
(Note 7)
4.85
5
5.15
V
VOUT_33_EMC
VOUT regulator output voltage
under EMC (Note 8)
DPI EMC test applied to LIN pin.
No bus capacitor. SOIC8 package;
(Note 7)
3.201
3.3
3.399
V
ILIM_VOUT
VOUT current limitation
VOUT regulator active;
current flowing to VOUT load
70
120
350
mA
VDROP_VOUT
Drop−out voltage between VS
and VOUT
5.5 V < VS < 40 V;
IVOUT = 70 mA
0.55
V
ISINK_VOUT
VOUT sink current
VOUT regulator active, current
flowing into the VOUT pin
100
240
400
mA
CVOUT
VOUT regulator filtering
capacitance (Note 9)
Equivalent series resistance < 7
W
1.8
10
mF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. In case LIN bus capacitor of at least 82 pF is not used VOUT_5_EMC and VOUT_33_EMC needs to be taken into account.
7. Tested according to: LIN Conformance Test Specification Package for LIN 2.1, October 10th, 2008. Verified by external test house.
8. Values based on design and characterization. Not tested in production.
9. In parallel with this capacitor any other capacitor can be placed with no limit to ESR and capacitance value
10. The voltage drop in Normal mode between LIN and VS pin is the sum of the diode drop and the drop at serial pull−up resistor. The drop
at the switch is negligible. See Figure 1.


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