ISP1583 datasheet(53/87 Pages) PHILIPS

Part #	ISP1583

Description	Hi-Speed Universal Serial Bus peripheral controller

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Manufacturer	PHILIPS [NXP Semiconductors]

Direct Link	http://www.nxp.com

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Philips Semiconductors

ISP1583

Hi-Speed USB peripheral controller

Product data

Rev. 03 — 12 July 2004

53 of 87

9397 750 13461

[1]

Task File register 1F7 is a write-only register; a read will return FFh.

9.4.6

DMA Interrupt Reason register (address: 50h)

This 2-byte register shows the source(s) of DMA interrupt. Each bit is refreshed after

a DMA command has been executed. An interrupt source is cleared by writing logic 1

to the corresponding bit. When reading, AND the value of the bits in this register with

the value of the corresponding bits in the DMA Interrupt Enable register.

The bit allocation is given in Table 70.

Table 66:

Task File 1F6 register (address: 4Dh): bit allocation

CS1_N = H, CS0_N = L, DA2 = H, DA1 = H, DA0 = L.

Bit

7

6

5

4

3

2

1

0

Symbol

drive/head/LBA[27:24] (ATA) or drive (ATAPI)

Reset

000000

0

Bus reset

000000

0

Access

R/W

Table 67:

Task File 1F7 register (address: 44h): bit allocation

CS1_N = H, CS0_N = L, DA2 = H, DA1 = H, DA0 = H.

Bit

7

6

5

4

3

2

1

0

Symbol

command (ATA) or status[1]/command (ATAPI)

Reset

00000000

Bus reset

00000000

Access

WWWWWWWW

Table 68:

Task File 3F6 register (address: 4Eh): bit allocation

CS1_N = L, CS0_N = H, DA2 = H, DA1 = H, DA0 = L.

Bit

7

6

5

4

3

2

1

0

Symbol

alternate status/command (ATA or ATAPI)

Reset

00000000

Bus reset

00000000

Access

R/W

Table 69:

Task File 3F7 register (address: 4Fh): bit allocation

CS1_N = L, CS0_N = H, DA2 = H, DA1 = H, DA0 = H.

Bit

7

6

5

4

3

2

1

0

Symbol

drive address (ATA) or reserved (ATAPI)

Reset

00000000

Bus reset

00000000

Access

R/W

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