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ISP1582 Datasheet(PDF) 6 Page - NXP Semiconductors

Part No. ISP1582
Description  Hi-Speed Universal Serial Bus peripheral controller
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

ISP1582 Datasheet(HTML) 6 Page - NXP Semiconductors

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Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
Preliminary data
Rev. 03 — 25 August 2004
6 of 66
9397 750 13699
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7.2 Pin description
Table 2:
Pin description
Symbol[1]
Pin
Type[2] Description
AGND
1
-
analog ground
RPU
2
A
connect to the external pull-up resistor for pin DP; must be
connected to 3.3 V via a 1.5 k
Ω resistor
DP
3
A
USB D+ line connection (analog)
DM
4
A
USB D
− line connection (analog)
AGND
5
-
analog ground
RREF
6
A
connect to the external bias resistor; must be connected to
ground via a 12.0 k
Ω± 1 % resistor
RESET_N
7
I
reset input (500
µs); a LOW level produces an asynchronous
reset; connect to VCC for the power-on reset (internal POR
circuit)
TTL; 5 V tolerant
EOT
8
I
End-of-transfer input (programmable polarity); used in DMA
slave mode only; when not in use, connect this pin to VCC(I/O)
through a 10 k
Ω resistor
input pad; TTL; 5 V tolerant
DREQ
9
O
DMA request (programmable polarity) output; when not in
use, connect this pin to ground through a 10 k
Ω resistor; see
Table 54 and Table 55
TTL; 4 ns slew-rate control
DACK
10
I
DMA acknowledge input (programmable polarity); when not
in use, connect this pin to VCC(I/O) through a 10 kΩ resistor;
see Table 54 and Table 55
TTL; 5 V tolerant
DIOR
11
I
DMA read strobe input (programmable polarity); when not in
use, connect this pin to VCC(I/O) through a 10 kΩ resistor; see
Table 54 and Table 55
TTL; 5 V tolerant
DIOW
12
I
DMA write strobe input (programmable polarity); when not in
use, connect this pin to VCC(I/O) through a 10 kΩ resistor; see
Table 54 and Table 55
TTL; 5 V tolerant
DGND
13
-
digital ground
INT
14
O
interrupt output; programmable polarity (active HIGH or
LOW) and signaling (edge or level triggered)
CMOS output; 8 mA drive
CS_N
15
I
chip select input
input pad; TTL; 5 V tolerant
RD_N
16
I
read strobe input
input pad; TTL; 5 V tolerant
WR_N
17
I
write strobe input
input pad; TTL; 5 V tolerant


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