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TPS799-Q1 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS799-Q1 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 25 page ![]() OUT NR IN GND EN 1 2 3 5 4 TPS799-Q1 www.ti.com SBVS097F – MARCH 2008 – REVISED JUNE 2015 5 Pin Configuration and Functions DDC Package 5-Pin SOT-23 Top View Pin Functions PIN DESCRIPTION NAME NO. (SOT) NO. (SON) IN 1 6 Input supply GND 2 3, Pad Ground. The pad must be tied to GND. Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into EN 3 4 shutdown mode. EN can be connected to IN if not used. Fixed-voltage versions only; connecting an external capacitor to this pin bypasses noise generated by NR 4 2 the internal bandgap. This capacitor allows output noise to be reduced to very low levels. Adjustable version only; this pin is the input to the control loop error amplifier, and is used to set the FB 4 2 output voltage of the device. Output of the regulator. A small capacitor (total typical capacitance ≥ 2 μF ceramic) is needed from OUT 5 1 this pin to ground to ensure stability. N/C — 5 Not internally connected. This pin must either be left open or tied to GND. Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS799-Q1 |
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