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IDT7028L15PF Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT7028L15PF Datasheet(HTML) 4 Page - Integrated Device Technology |
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4 / 17 page  4 IDT7028L High-Speed 64K x 16 Dual-Port Static RAM Industrial and Commercial Temperature Ranges Truth Table I: Chip Enable(1,2) Truth Table II: Non-Contention Read/Write Control NOTES: 1. A0L – A15L ≠ A0R – A15R. 2. Refer to Chip Enable Truth Table. Truth Table III: Semaphore Read/Write Control(1) NOTES: 1. There are eight semaphore flags written to via I/O0 and read from all the I/Os (I/O0-I/O15). These eight semaphore flags are addressed by A0-A2. 2. Refer to Chip Enable Truth Table. NOTES: 1. Chip Enable references are shown above with the actual CE0 and CE1 levels, CE is a reference only. 2. 'H' = VIH and 'L' = VIL. 3. CMOS standby requires 'X' to be either < 0.2V or > VCC - 0.2V. CE CE0 CE1 Mode L VIL VIH Port Selected (TTL Active) < 0.2V >VCC -0.2V Port Selected (CMOS Active) H VIH X Port Deselected (TTL Inactive) XVIL Port Deselected (TTL Inactive) >VCC -0.2V X Port Deselected (CMOS Inactive) X<0.2V Port Deselected (CMOS Inactive) 4836 tbl 06 Inputs (1) Outputs Mode CE(2) R/ W OE UB LB SEM I/O8-15 I/O0-7 H X X X X H High-Z High-Z Deselected: Power-Down X X X H H H High-Z High-Z Both Bytes Deselected LL X L H H DATAIN High-Z Write to Upper Byte Only L L X H L H High-Z DATAIN Write to Lower Byte Only L L X LLH DATAIN DATAIN Write to Both Bytes LH L L H H DATAOUT High-Z Read Upper Byte Only L H LH LH High-Z DATAOUT Read Lower Byte Only L H L LLH DATAOUT DATAOUT Read Both Bytes X X H X X X High-Z High-Z Outputs Disabled 4836 tbl 07 Inputs (1) Outputs Mode CE(2) R/ W OE UB LB SEM I/O8-15 I/O0-7 HH L X X L DATAOUT DATAOUT Read Data in Semaphore Flag XH L H H L DATAOUT DATAOUT Read Data in Semaphore Flag H ↑ XX X L DATAIN DATAIN Write I/O0 into Semaphore Flag X ↑ XH H L DATAIN DATAIN Write I/O0 into Semaphore Flag L X XL XL ______ ______ Not Allowed LX X X L L ______ ______ Not Allowed 4836 tbl 08 |
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