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DS17487 Datasheet(PDF) 11 Page - Dallas Semiconductor |
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DS17487 Datasheet(HTML) 11 Page - Dallas Semiconductor |
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11 / 38 page  DS17485/DS17487 11 of 38 REGISTER C MSB LSB BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 IRQF PF AF UF 0 0 0 0 IRQF – Interrupt Request Flag. This bit is set to a 1 when one or more of the following are true: PF = PIE = 1 WF = WIE= 1 AF = AIE = 1 KF = KSE= 1 UF = UIE = 1 RF = RIE = 1 i.e., IRQF = (PF x PIE) + (AF x AIE) + (UF x UIE) + (WF x WIE) + (KF x KSE) + (RF x RIE) Any time the IRQF bit is a 1, the IRQ pin is driven low. Flag bits PF, AF, and UF are cleared after Register C is read by the program. PF – Periodic Interrupt Flag. This is a read-only bit that is set to a 1 when an edge is detected on the selected tap of the divider chain. The RS3 through RS0 bits establish the periodic rate. PF is set to a 1 independent of the state of the PIE bit. When both PF and PIE are 1s, the IRQ signal is active and sets the IRQF bit. The PF bit is cleared by a software read of Register C. AF – Alarm Interrupt Flag. A 1 in the AF bit indicates that the current time has matched the alarm time. If the AIE bit is also a 1, the IRQ pin goes low and a 1 appears in the IRQF bit. A read of Register C clears AF. UF – Update Ended Interrupt Flag. This bit is set after each update cycle. When the UIE bit is set to 1, the 1 in UF causes the IRQF bit to be a 1, which asserts the IRQ pin. UF is cleared by reading Register C. BIT 3 to BIT 0 – These are unused bits of the status Register C. These bits always read 0 and cannot be written. REGISTER D MSB LSB BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 VRT 0 0 0 0 0 0 0 VRT – Valid RAM and Time. This bit is a read-only status bit. When VRT = 0, the RTC and RAM data are questionable and indicates that the lithium energy source has been exhausted and should be replaced. This bit indicates that status of the VBAT and VBAUX inputs. BIT 6 to BIT 0 – The remaining bits of Register D are not usable. They cannot be written and, when read, they always read 0. |
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