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DS1085 Datasheet(PDF) 18 Page - Dallas Semiconductor |
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DS1085 Datasheet(HTML) 18 Page - Dallas Semiconductor |
18 / 21 page ![]() DS1085 18 of 21 AC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE (VCC = 5V ±5%, TA = 0°C to +70°C.) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NOTES Fast mode 400 SCL Clock Frequency fSCL Standard mode 100 kHz 14 Fast mode 1.3 Bus Free Time Between a STOP and START Condition tBUF Standard mode 4.7 ms Fast mode 0.6 Hold Time (Repeated) START Condition tHD:STA Standard mode 4.0 ms 11 Fast mode 1.3 LOW Period of SCL tLOW Standard mode 4.7 ms Fast mode 0.6 HIGH Period of SCL tHIGH Standard mode 4.0 ms Fast mode 0.6 Setup Time for a Repeated START tSU:STA Standard mode 4.7 ms Fast mode 0 Data Hold Time tHD:DAT Standard mode 0 0.9 ms 12, 13 Fast mode 100 Data Setup Time tSU:DAT Standard mode 250 ns 14 Fast mode 300 Rise Time of Both SDA and SCL Signals tR Standard mode 20 + 0.1CB 1000 ns 15 Fast mode 300 Fall Time of Both SDA and SCL Signals tF Standard mode 20 + 0.1CB 1000 ns 15 Fast mode 0.6 Setup Time for STOP tSU:STO Standard mode 4.0 ms Capacitive Load for each Bus Line CB 400 pF 15 NV Write-Cycle Time tWR 10 ms 16 NOTES: 1) All voltages are referenced to ground. 2) This is the absolute accuracy of the master oscillator frequency at the default settings. 3) This is the percent frequency change that is observed in output frequency with changes in voltage from nominal voltage at a temperature of TA = +25 °C. 4) This is the percentage frequency change from the +25°C frequency due to temperature at a nominal voltage of 5V. 5) The maximum temperature change varies with the master frequency setting. The minimum occurs at the default master frequency (fdefault). The maximums occur at the extremes of the master oscillator frequency range (66MHz or 133MHz). (See Figure 5 below.) 6) The integral nonlinearity of the frequency adjust DAC is a measure of the deviation from a straight line drawn between the two endpoints of a range. 7) DAC and OFFSET register settings must be configured to maintain the clock frequency within this range. Correct operation of the device is not guaranteed if these limits are exceeded. 8) Frequency settles faster for small charges in value. During a change, the frequency changes smoothly from the original value to the new value. |
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