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TPS73HD301PWPG4 Datasheet(PDF) 5 Page - Texas Instruments |
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TPS73HD301PWPG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 36 page TPS73HD301, TPS73HD318, TPS73HD325 DUALOUTPUT LOW DROPOUT VOLTAGE REGULATORS SLVS167C − SEPTEMBER 1998 − REVISED − MAY 1999 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics, VI(IN) = 4.3 V, IO = 10 mA, EN = 0 V, CO = 4.7 µF/CSR† = 1 Ω, SENSE/FB shorted to OUT (unless otherwise noted) (continued) adjustable regulator PARAMETER TEST CONDITIONS‡ TJ MIN TYP MAX UNIT Reference voltage (1FB) 5 mA ≤ IO ≤ 750 mA, 25 °C 1.182 V Reference voltage (1FB) 5 mA ≤ IO ≤ 750 mA, See NOTE 2 −40 °C to 125°C 1.147 1.217 V Reference voltage temperature coef- ficient −40 °C to 125°C 61 75 ppm/ °C 50 µA ≤ IO ≤ 750 mA, 25 °C 0.52 1 Pass-element series resistance (see 50 µA ≤ IO ≤ 750 mA, See NOTE 2 −40 °C to 125°C 1 Ω Pass-element series resistance (see Note 3) VI = 3.9 V, 50 µA ≤ IO ≤ 750 mA 25 °C 0.32 Ω Note 3) VI = 5.9 V, 50 µA ≤ IO ≤ 750 mA 25 °C 0.23 Input regulation VI = 3.5 V, 50 µA ≤ IO ≤ 750 mA 25 °C 3 mV Output regulation IO = 5 mA to 750 mA, See NOTE 2 25 °C 7 mV Output regulation IO = 50 µA to 750 mA, See NOTE 2 25 °C 10 mV Ripple rejection f = 120 Hz, IO = 50 µA 25 °C 59 dB Ripple rejection f = 120 Hz, IO = 500 mA 25 °C 54 dB Output noise-spectral density f = 120 Hz 25 °C 2 mV/ √Hz 10 Hz f 100 kHz, CL = 4.7 µF 25 °C 95 Output noise voltage 10 Hz ≤ f ≤ 100 kHz, CSR = 1 Ω CL = 10 µF 25 °C 89 µV/rms Output noise voltage CSR = 1 Ω CL = 100 µF 25 °C 74 µV/rms V(TO) Trip-threshold voltage (RESET)§ VO(FB) decreasing −40 °C to 125°C 1.101 1.145 V Vhys Hysteresis voltage (RESET)§ Measured at VO(ER) 25 °C 12 mV VOL Low-level output voltage (RESET)§ VI = 2.13 V, IO(RESET) = 400 A 25 °C 0.1 0.4 V VOL Low-level output voltage (RESET)§ VI = 2.13 V, IO(RESET) = 400 µA −40 °C to 125°C 0.4 V II Input current (1FB) 25 °C −10 0.1 10 nA II Input current (1FB) −40 °C to 125°C −20 20 nA † CSR (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any series resistance added externally, and PWB trace resistance to CL. ‡ Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately. § Output voltage programmed to 2.5 V with closed-loop configuration (see application information) NOTE 3: To calculate dropout voltage, use equation: V DO + I O r DS(ON) rDS(ON) is a function of both output current and input voltage. This parametric table lists rDS(ON) for VI = 3.9 V and 5.9 V, which corresponds to dropout conditions for programmed output voltages of 4 V and 6 V respectively. For other programmed values, refer to Figure 29. |
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