CY7C67300
Document #: 38-08015 Rev. *E
Page 10 of 119
1.0
INTRODUCTION
EZ-Host™ (CY7C67300) is Cypress Semiconductor’s first full-speed, low-cost multiport host/peripheral controller. EZ-Host is
designed to easily interface to most high-performance CPUs to add USB host functionality. EZ-Host has its own 16-bit RISC
processor to act as a coprocessor or operate in standalone mode. EZ-Host also has a programmable I/O interface block allowing
a wide range of interface options.
1.1
EZ-Host Features
• Single-chip programmable USB dual-role (Host/Peripheral) controller with two configurable Serial Interface Engines
(SIEs) and four USB ports
• Support for USB On-The-Go (OTG) protocol
• On-chip 48-MHz 16-bit processor with dynamically switchable clock speed
• Configurable I/O block supporting a variety of I/O options or up to 32 bits of General Purpose I/O (GPIO)
• 4K x 16 internal masked ROM containing built-in BIOS that supports a communication ready state with access to I2C
EEPROM Interface, external ROM, UART, or USB
• 8K x 16 internal RAM for code and data buffering
• Extended memory interface port for external SRAM and ROM
• 16-bit parallel Host Port Interface (HPI) with a DMA/Mailbox data path for an external processor to directly access all
of the on-chip memory and control on-chip SIEs
• Fast serial port supports from 9600 baud to 2.0 Mbaud
• SPI support in both master and slave
• On-chip 16-bit DMA/Mailbox data path interface
• Supports 12-MHz external crystal or clock
• 3.3V operation
• Package option — 100-pin TQFP
Figure 1-1. Block Diagram
Timer 0
Timer 1
Watchdog
Control
4Kx16
ROM BIOS
8Kx16
RAM
CY16
16-bit RISC CORE
External MEM I/F
(SRAM/ROM)
SIE1
USB-A
USB-B
SIE2
USB-A
USB-B
OTG
Host/
Peripheral
USB Ports
D+,D-
D+,D-
D+,D-
D+,D-
UART I/F
PWM
HSS I/F
I2C
EEPROM I/F
HPI I/F
IDE I/F
SPI I/F
nRESET
A[15:0] D[15:0] CTRL[9:0]
CY7C67300
GPIO [31:0]
PLL
X1
X2
GPIO
SHARED INPUT/OUTPUT PINS
Vbus, ID
Mobile
Power
Booster
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