CDCFR83

DIRECT RAMBUS

 CLOCK GENERATOR

SCAS665A – APRIL 2001 REVISED MARCH 2002

6

POST OFFICE BOX 655303

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS†

MIN

TYP‡

MAX

UNIT

Output voltage during CLK Stop

(STOPB = 0)

See Figure 1

1.1

2

VO(X)

Output crossing-point voltage

See Figure 1 and Figure 6

1.3

1.8

V

VO

Output voltage swing

See Figure 1

0.4

0.6

V

Input clamp voltage

VDD = 3.135 V,

II = –18 mA

–1.2

V

See Figure 1

2

VOH

High-level output voltage

VDD = min to max,

IOH = –1 mA

VDD – 0.1 V

V

VDD = 3.135 V,

IOH = –16 mA

2.4

See Figure 1

1

VOL

Low-level output voltage

VDD = min to max,

IOL = 1 mA

0.1

V

VDD = 3.135 V,

IOL = 16 mA

0.5

VDD = 3.135 V,

VO = 1 V

–32

–52

IOH

High-level output current

VDD = 3.3 V,

VO = 1.65 V

–51

mA

VDD = 3.465 V,

VO = 3.135 V

–14.5

–21

VDD = 3.135 V,

VO = 1.95 V

43

61.5

IOL

Low-level output current

VDD = 3.3 V,

VO = 1.65 V

65

mA

VDD = 3.465 V,

VO = 0.4 V

25.5

36

IOZ

High-impedance-state output

current

S0 = 0,

S1 = 1

±10

µA

IOZ(STOP)

High-impedance-state output

current during CLK stop

Stop = 0, VO = GND or VDD

±100

µA

IOZ(PD)

High-impedance-state output

current in power-down state

PWRDNB = 0,

VO = GND or VDD

–10

100

µA

IIH

High-level

REFCLK, PCLKM,

SYNCLKN, STOPB

VDD = 3.465 V,

VI = VDD

10

µA

IIH

g

input current

PWRDNB, S0, S1,

S2, MULT0, MULT1

VDD = 3.465 V,

VI = VDD

10

µA

IIL

Low-level

REFCLK, PCLKM,

SYNCLKN, STOPB

VDD = 3.465 V,

VI = 0

–10

µA

IIL

input current

PWRDNB, S0, S1,

S2, MULT0, MULT1

VDD = 3.465 V,

VI = 0

–10

µA

ZO

Output

High state

RI at IO –14.5 mA to –16.5 mA

15

35

50

Ω

ZO

impedance

Low state

RI at IO 14.5 mA to 16.5 mA

11

17

35

Ω

Reference

VDDIR VDDIPD

VDD = 3 465 V

PWRDNB = 0

50

µA

current

VDDIR, VDDIPD

VDD = 3.465 V

PWRDNB = 1

0.5

mA

CI

Input capacitance

VI = VDD or GND

2

pF

CO

Output capacitance

VO = VDD or GND

3

pF

IDD(PD)

Supply current in power-down state

REFCLK = 0 MHz to 100 MHz,

PWDNB = 0,

STOPB = 1

100

µA

IDD(CLKSTOP) Supply current in CLK stop state

BUSCLK configured for 533 MHz

45

mA

IDD(NORMAL)

Supply current in normal state

BUSCLK = 533 MHz

100

mA

† VDD refers to any of the following; VDD, VDDIPD, VDDIR, VDDO, VDDC, and VDDP

‡ All typical values are at VDD = 3.3 V, TA = 25°C.