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M8040A Datasheet(PDF) 18 Page - Keysight Technologies

Part No. M8040A
Description  M8040A High-Performance BERT 64 GBaud
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Maker  KEYSIGHT [Keysight Technologies]
Homepage  http://www.keysight.com
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M8040A Datasheet(HTML) 18 Page - Keysight Technologies

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18 | Keysight | M8040A High-Performance BERT 64 GBaud - Data Sheet
PRBS 1
2n–1, n= 7, 10, 11, 15, 23, 23p, 31, 33, 35, 39, 45, 49, 51, 58
PRBS
2n, n = 7, 10, 11, 13, 15, 23
QPRBS
OIF-CEI: QPRBS13-CEI, QPRBS31-CEI
IEEE 802.3: QPRBS13, PRBS13Q, PRBS31Q, SSPRQ
New patterns in library
PAM-4-linearity, JP03A, JP03B
PAM-4 coding
Gray coding, custom mapping of 00, 01,10,11 to symbols 0,1,2,3
Mark density
PRBS 1/8 to 7/8
Zero substitution
Yes
Export/Import
Patterns from M8000 and N4900 series can be imported
Pattern library
Yes
User definable memory
NRZ: 2 Gbit/channel
PAM-4: 1 Gsymbol/channel
Vector/sequence granularity
512 bit
Pattern capture
Yes, raw data for PAM-4
Capture data starts on event
– User defined (minimum) amount of pre-event bits/ symbols and minimum capture bit/symbols
– Events: error, CTRL IN A /B, immediate
– Max 2 Gbit/ch capture data for NRZ, 1 Gsymbol/ch for PAM-4
Save captured data:
– With errors
– As expected data (ignores error content)
– As PG data (ignores error content)
– Export via pattern editor windows
– Convert bits into all other codings and vice versa
– Ability to mask error bits automatically
Display of captured data:
– Display errors with color coding
Navigate through error bits/symbols (find next/previous)
Pattern sequencer
3 counted loop levels, 1 infinite loop, # of blocks: 500
Masking
Expected bits and be masked (ignored) during error counting. Bitwise and block-wise masking is
possible.
Table 19. Specifications for pattern, sequencer.
1.
Polarity is inverted compared to ParBERT and J-BERT N4903A/B and N49xx series.
Pattern and sequencer


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