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PN7150 Datasheet(PDF) 36 Page - NXP Semiconductors |
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PN7150 Datasheet(HTML) 36 Page - NXP Semiconductors |
36 / 55 page PN7150 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 3.3 — 4 July 2016 36 of 55 NXP Semiconductors PN7150 Full NFC Forum-compliant controller with integrated firmware [1] Refer to Section 10.1.2 for the description of the power modes. [2] This is the same value for VBAT = 2.3 V when the monitor threshold is set to 2.3 V. 14.2 Functional block electrical characteristics 14.2.1 Battery voltage monitor characteristics 14.2.2 Reset via VEN 14.2.3 Power-up timings 14.2.4 Power-down timings 14.2.5 I2C-bus timings Here below are timings and frequency specifications. Table 27. Battery voltage monitor characteristics Symbol Parameter Conditions Min Typ Max Unit Vth threshold voltage set to 2.3 V 2.15 2.3 2.45 V set to 2.75 V 2.6 2.75 2.9 V Vhys hysteresis voltage 100 150 200 mV Table 28. Reset timing Symbol Parameter Conditions Min Typ Max Unit tW(VEN) VEN pulse width to reset 10 - - s tboot boot time - - 2.5 ms Table 29. Power-up timings Symbol Parameter Conditions Min Typ Max Unit tt(VBAT-VEN) transition time from pin VBAT to pin VEN VBAT, VEN voltage = HIGH 00.5 - ms tt(VDDPAD-VEN) transition time from pin VDD(PAD) to pin VEN VDD(PAD), VEN voltage = HIGH 00.5 - ms tt(VBAT-VDDPAD) transition time from pin VBAT to pin VDD(PAD) VBAT, VDD(PAD) = HIGH 00.5 - ms Table 30. Power-down timings Symbol Parameter Conditions Min Typ Max Unit tVBAT(L) time VBAT LOW 20 --ms |
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