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PCA9849PWJ Datasheet(PDF) 11 Page - NXP Semiconductors |
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PCA9849PWJ Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 30 page  PCA9849 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1 — 16 November 2015 11 of 30 NXP Semiconductors PCA9849 4-channel ultra-low voltage, Fm+ I2C-bus multiplexer with reset 6.7 Voltage level translation between I2C-buses Today’s complex systems often use multiple power supplies to maximize power savings and to meet the operating specifications of the devices used. This means that various I2C-buses are also operating at differing voltage levels and cannot simply connect together. In addition, modern microcontrollers operate down to 0.8 V to save power, further complicating the connection of I2C-buses. The PCA9849 is specifically designed to seamlessly handle these voltage level translation issues. Any combination of bus voltages can be intermixed on the PCA9849 and correctly translated to the other bus at Fm+ (1 MHz) speed. Figure 14 shows a typical application. The microcontroller acts as the master and operates at 0.8 V with its I2C-bus swinging between 0 V and 0.8 V. The temperature sensor on channel 0 of the PCA9849 has a operates at 3.3 V, while the GPIO Expander on channel 1 operates down to 1.8 V to interface with chip select and reset inputs on various other ICs also operating at 1.8 V. Channel 2 of the PCA9849 is connected to the I2C-bus of a power management device, operating at 2.5 V. The other channels of PCA9849 are simply left unconnected. VDD1 of the PCA9849 is a bias supply and is set at the lowest bus voltage, or 0.8 V of the microcontroller. VDD1 sets the input switching points of each SCL and SDA at 0.3 VDD1 for a LOW level and 0.7 V DD1 for a HIGH level. VDD2 is the core logic supply from which most of the PCA9849 circuitry runs. It must be at least 0.8 V larger than VDD1 to allow proper operation of the pass transistor switches. Since VDD1 is 0.8 V, VDD2 must be greater than 1.6 V. Since the GPIO Expander on channel 1 is running at 1.8 V, an adequate power supply is available. The I2C-bus is open-drain, so pull-up resistors are needed on each I2C-bus segment. This is where the voltage level translation happens. The pass transistor internal to the PCA9849 limit the output voltage to VDD1 which is the lowest bus voltage. The pull-up resistors will then limit the HIGH level of each bus segment to the power supply of the devices on that segment. Note that the pull-up resistors on channel 0 are connected to 3.3 V, the and resistors on channel 1 are connected to 1.8 V, while the resistors on channel 2 are connected to 2.5 V — effectively translating the 0.8 V signal swing of the microcontroller to the correct voltage level for each peripheral. Fig 13. Power-on reset voltage (VPOR) aaa-014363 POR time VDD2 time VPOR (rising VDD2) VPOR (falling VDD2) |
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