LPC54102J256BD64QL datasheet(22/90 Pages) NXP

Part #	LPC54102J256BD64QL

Description	32-bit ARM Cortex-M4/M0 MCU; 104 kB SRAM; 512 kB flash, 3 x I2C, 2 x SPI, 4 x USART, 32-bit counter/ timers, SCTimer/PWM, 12-bit 5.0 Msamples/sec ADC

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Manufacturer	NXP [NXP Semiconductors]

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22 / 90 page

LPC5410x

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Product data sheet

Rev. 2.6 — 3 October 2016

22 of 90

NXP Semiconductors

LPC5410x

32-bit ARM Cortex-M4/M0+ microcontroller

7.7.2 Interrupt sources

Each peripheral device has one interrupt line connected to the NVIC but may have several

interrupt flags.

7.8 System Tick timer (SysTick)

The ARM Cortex-M4 and ARM Cortex-M0+ cores include a system tick timer (SysTick)

that is intended to generate a dedicated SYSTICK exception. The clock source for the

SysTick can be the system clock or the SYSTICK clock.

7.9 On-chip static RAM

The LPC5410x support 104 kB SRAM with separate bus master access for higher

throughput and individual power control for low-power operation.

7.10 On-chip flash

The LPC5410x supports 512 kB of on-chip flash memory.

7.11 On-chip ROM

The 64 kB on-chip ROM contains the boot loader and the following Application

Programming Interfaces (API):

• In-System Programming (ISP) and In-Application Programming (IAP) support for flash

programming.

• Power control API for configuring power consumption and PLL settings.

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LPC54102J256BD64QL Datasheet(PDF) 22 Page - NXP Semiconductors

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