 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TDA9888TS Datasheet(PDF) 5 Page - NXP Semiconductors |
|
||||||||||||||||||||||||||||||
TDA9888TS Datasheet(HTML) 5 Page - NXP Semiconductors |
|
|
5 / 22 page  2004 Nov 02 5 Philips Semiconductors Product specification DVB selective AGC amplifier TDA9888TS; TDA9889TS PINNING SYMBOL PIN DESCRIPTION S0 1 logic switch S0 input (frequency select) REF 2 4 MHz crystal or reference input S2 3 logic switch S2 input (AGC select) LFS 4 loop filter synthesizer PLL LFLP 5 loop filter low-pass control PLL AGC 6 AGC control voltage input LIF1 7 low IF differential output 1 LIF2 8 low IF differential output 2 TADJ 9 tuner AGC TakeOver Point (TOP) adjustment TAGC 10 tuner AGC output TAGCEXT 11 external tuner AGC voltage input VP 12 supply voltage (+5 V) S1 13 logic switch S1 input (frequency select) GND 14 ground supply IF1 15 IF differential input 1 IF2 16 IF differential input 2 handbook, halfpage TDA9888TS TDA9889TS MHC093 1 2 3 4 5 6 7 8 S0 REF S2 LFS LFLP AGC LIF1 LIF2 IF2 IF1 GND S1 VP TAGCEXT TAGC TADJ 16 15 14 13 12 11 10 9 Fig.2 Pin configuration. FUNCTIONAL DESCRIPTION Figure 1 shows the simplified block diagram of the device. The integrated circuit contains the following functional blocks: 1. Gain controlled IF amplifier 2. Tuner AGC 3. Reference generation 4. Synthesizer for downconversion 5. Downconversion and complex filtering 6. Tracking low-pass filter with reference control 7. Low IF differential output stage 8. Logic control 9. Internal voltage stabilizer. Gain controlled IF amplifier The IF amplifier consists of three AC-coupled differential stages. Gain control is performed by emitter degeneration. Total gain control range is 70 dB (typ.). The differential input impedance is typical 2 k Ω in parallel with 3 pF. Tuner AGC The tuner AGC is realized by a TakeOver Point (TOP) network and a peak-level detector. The threshold level of the peak detector can be adjusted by an external potentiometer connected to pin TADJ. For IF signals above this threshold the level detector provides a discharge current to pin TAGC. An additional current source is internally connected to this pin providing charge current to the external tuner AGC capacitor. For IF signals of 8 dB below the threshold voltage this current will be increased by a factor of approximately 40 for faster AGC reaction. The ratio of discharge to charge current is normally approximately 2000 and approximately 50 for fast mode. For use of the device in different applications the charge current can be switched off, for hybrid applications the signal at pin TAGCEXT can be fed via a transmission gate to pin TAGC (TDA9888TS; TDA9889TS combined with analog IF), controlled by the 3-state input pin S2. With an activated transmission gate all internal currents are off. In the event that the tuner AGC is not needed (e.g. TAGC from channel decoder or from an analog IF in hybrid chassis), pin TADJ should be left open-circuit and therefore all internal AGC currents will be switched off. |
Similar Part No. - TDA9888TS |
|
Similar Description - TDA9888TS |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
