![]() |
Electronic Components Datasheet Search |
|
TC55V040AFT-55 Datasheet(PDF) 4 Page - Toshiba Semiconductor |
|
TC55V040AFT-55 Datasheet(HTML) 4 Page - Toshiba Semiconductor |
4 / 11 page ![]() TC55V040AFT-55,-70 2003-08-06 4/11 AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = −40° to 85°C, VDD = 2.7 to 3.6 V) READ CYCLE TC55V040AFT -55 -70 SYMBOL PARAMETER MIN MAX MIN MAX UNIT tRC Read Cycle Time 55 70 tACC Address Access Time 55 70 tCO1 Chip Enable( 1 CE ) Access Time 55 70 tCO2 Chip Enable(CE2) Access Time 55 70 tOE Output Enable Access Time 30 35 tCOE Chip Enable Low to Output Active 5 5 tOEE Output Enable Low to Output Active 0 0 tOD Chip Enable High to Output High-Z 25 30 tODO Output Enable High to Output High-Z 25 30 tOH Output Data Hold Time 10 10 ns WRITE CYCLE TC55V040AFT -55 -70 SYMBOL PARAMETER MIN MAX MIN MAX UNIT tWC Write Cycle Time 55 70 tWP Write Pulse Width 45 50 tCW Chip Enable to End of Write 50 60 tAS Address Setup Time 0 0 tWR Write Recovery Time 0 0 tODW R/W Low to Output High-Z 25 30 tOEW R/W High to Output Active 0 0 tDS Data Setup Time 25 30 tDH Data Hold Time 0 0 ns AC TEST CONDITIONS PARAMETER TEST CONDITION Output load 30 pF + 1 TTL Gate Input pulse level 0.4 V, 2.4 V Timing measurements VDD × 0.5 Reference level VDD × 0.5 tR, tF 5 ns |