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LF198 Datasheet(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. LF198
Description  Monolithic Sample-and-Hold Circuits
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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LF198 Datasheet(HTML) 2 Page - National Semiconductor (TI)

 
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
±18V
Power Dissipation (Package
Limitation) (Note 2)
500 mW
Operating Ambient Temperature Range
LF198/LF198A
−55˚C to +125˚C
LF298
−25˚C to +85˚C
LF398/LF398A
0˚C to +70˚C
Storage Temperature Range
−65˚C to +150˚C
Input Voltage
Equal to Supply Voltage
Logic To Logic Reference
Differential Voltage (Note 3)
+7V, −30V
Output Short Circuit Duration
Indefinite
Hold Capacitor Short
Circuit Duration
10 sec
Lead Temperature (Note 4)
H package (Soldering, 10 sec.)
260˚C
N package (Soldering, 10 sec.)
260˚C
M package:
Vapor Phase (60 sec.)
215˚C
Infrared (15 sec.)
220˚C
Thermal Resistance (
θ
JA) (typicals)
H package
215˚C/W (Board mount in still air)
85˚C/W (Board mount in
400LF/min air flow)
N package
115˚C/W
M package
106˚C/W
θ
JC (H package, typical) 20˚C/W
Electrical Characteristics
The following specifcations apply for −V
S + 3.5V ≤ VIN ≤ +VS − 3.5V, +VS = +15V, −VS = −15V, TA =Tj = 25˚C, Ch = 0.01 µF,
R
L =10 kΩ, LOGIC REFERENCE = 0V, LOGIC HIGH = 2.5V, LOGIC LOW = 0V unless otherwise specified.
Parameter
Conditions
LF198/LF298
LF398
Units
Min
Typ
Max
Min
Typ
Max
Input Offset Voltage, (Note 5)
T
j = 25˚C
1
3
2
7
mV
Full Temperature Range
5
10
mV
Input Bias Current, (Note 5)
T
j = 25˚C
5
25
10
50
nA
Full Temperature Range
75
100
nA
Input Impedance
T
j = 25˚C
10
10
10
10
Gain Error
T
j = 25˚C, RL = 10k
0.002
0.005
0.004
0.01
%
Full Temperature Range
0.02
0.02
%
Feedthrough Attenuation Ratio
T
j = 25˚C, Ch = 0.01 µF
86
96
80
90
dB
at 1 kHz
Output Impedance
T
j = 25˚C, “HOLD” mode
0.5
2
0.5
4
Full Temperature Range
4
6
“HOLD” Step, (Note 6)
T
j = 25˚C, Ch = 0.01 µF, VOUT = 0
0.5
2.0
1.0
2.5
mV
Supply Current, (Note 5)
T
j≥25˚C
4.5
5.5
4.5
6.5
mA
Logic and Logic Reference Input
T
j = 25˚C
2
10
2
10
µA
Current
Leakage Current into Hold
T
j = 25˚C, (Note 7)
30
100
30
200
pA
Capacitor (Note 5)
Hold Mode
Acquisition Time to 0.1%
∆V
OUT = 10V, Ch = 1000 pF
4
4
µs
C
h = 0.01 µF
20
20
µs
Hold Capacitor Charging Current
V
IN−VOUT =2V
5
5
mA
Supply Voltage Rejection Ratio
V
OUT = 0
80
110
80
110
dB
Differential Logic Threshold
T
j = 25˚C
0.8
1.4
2.4
0.8
1.4
2.4
V
Input Offset Voltage, (Note 5)
T
j = 25˚C
1
1
2
2
mV
Full Temperature Range
2
3
mV
Input Bias Current, (Note 5)
T
j = 25˚C
5
25
10
25
nA
Full Temperature Range
75
50
nA
www.national.com
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