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SN74CB3Q6800 Datasheet(PDF) 1 Page - Texas Instruments

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Part No. SN74CB3Q6800
Description  10 BIT FET BUS SWITCH WITH PRECHAGED OUTPUTS 2.5V/3.3V LOW VOLTAGE HIGH BANDWIDTH BUS SWITCH
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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SN74CB3Q6800 Datasheet(HTML) 1 Page - Texas Instruments

 
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SN74CB3Q6800
10BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS
2.5V/3.3V LOW VOLTAGE HIGHBANDWIDTH BUS SWITCH
SCDS142A − OCTOBER 2003 − REVISED NOVEMBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D High-Bandwidth Data Path
(Up To 500 MHz)
D 5-V Tolerant I/Os with Device Powered-Up
or Powered-Down
D Low and Flat ON-State Resistance (ron)
Characteristics Over Operating Range
(ron = 4.5 Ω Typical)
D Rail-to-Rail Switching on Data I/O Ports
− 0- to 5-V Switching With 3.3-V VCC
− 0- to 3.3-V Switching With 2.5-V VCC
D B-Port Outputs Are Precharged by Bias
Voltage (BIASV) to Minimize Signal
Distortion During Live Insertion and
Hot-Plugging
D Supports PCI Hot Plug
D Bidirectional Data Flow, With Near-Zero
Propagation Delay
D Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(Cio(OFF) = 3.5 pF Typical)
D Fast Switching Frequency
(fON = 20 MHz Max)
† For additional information regarding the performance
characteristics of the CB3Q family, refer to the TI
application
report,
CBT-C,
CB3T,
and
CB3Q
Signal-Switch Families, literature number SCDA008.
D Data and Control Inputs Provide
Undershoot Clamp Diodes
D Low Power Consumption
(ICC = 0.75 mA Typical)
D VCC Operating Range From 2.3 V to 3.6 V
D Data I/Os Support 0 to 5-V Signaling Levels
(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
D Control Inputs Can be Driven by TTL or
5-V/3.3-V CMOS Outputs
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 1000-V Charged-Device Model (C101)
D Supports Both Digital and Analog
Applications: PCI Interface, Differential
Signal Interface, Memory Interleaving, Bus
Isolation, Low-Distortion Signal Gating
DBQ, DGV, OR PW PACKAGE
(TOP VIEW)
ON
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
VCC
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
BIASV
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Copyright
 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.


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