SN65LVDT14, SN65LVDT41

SLLS530 – APRIL 2002

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7

PARAMETER MEASUREMENT INFORMATION

VOD

100

Ω

3.75 k

Ω

3.75 k

Ω

_

+

0 V

≤ Vtest ≤ 2.4 V

Y

Z

Input

Figure 5. Driver VDO Test Circuit

VOC

Z

Y

Input

2 pF

3 V

0 V

VOC(PP)

VOC(SS)

VOC

49.9

Ω, ±1% (2 Places)

VIA

D

NOTE A:

All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 0.5 Mpps,

pulsewidth = 500

±10ns.CLincludesinstrumentationandfixturecapacitancewithin0,06mmoftheD.U.T.ThemeasurementofVOC(PP)

is made on test equipment with a –3 dB bandwidth of at least 1 GHz.

Figure 6. Test Circuit and Definitions for the Driver Common-Mode Output Voltage

2 V

1.4 V

0.8 V

100%

80%

20%

0%

0 V

VOD(H)

VOD(L)

Output

Input

VOD

Z

Y

Input

100

Ω

±1%

CL

(2 Places)

tPHL

tPLH

tftr

NOTES:A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 1 Mpps, pulse

width = 0.5

± 0.05 µs . CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T.

Figure 7. Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal