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OM6206 Datasheet(PDF) 19 Page - NXP Semiconductors |
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OM6206 Datasheet(HTML) 19 Page - NXP Semiconductors |
19 / 36 page 2001 Nov 14 19 Philips Semiconductors Product specification 65 × 102 pixels matrix LCD driver OM6206 10 HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices (see “Handling MOS devices”). 11 DC CHARACTERISTICS VDD = 2.5 to 5.5 V; VSS =0V; VLCD = 4.5 to 9.0 V; Tamb = −40 to +85 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDD1 supply voltage 1 2.5 − 5.5 V VDD2, VDD3 supply voltages 2 and 3 LCD voltage internally generated (voltage generator enabled) 2.5 − 4.5 V VLCDIN input supply voltage LCD LCD voltage externally supplied (voltage generator disabled) 4.5 − 9.0 V VLCDOUT output supply voltage LCD LCD voltage internally generated (voltage generator enabled); note 1 4.5 − 9.0 V IDD(tot) total supply current normal mode; VDD = 2.8 V; VLCD = 7.6 V; no serial clock; Tamb =25 °C; no display load; 4 × charge pump; note 2 − 200 300 µA Power-down mode; with internal or external VLCD; note 3 − 1.5 −µA ILCDIN supply current from external VLCD VDD = 2.8 V; VLCD = 7.6 V; no serial clock; Tamb =25 °C; no display load; notes 2 and 4 − 30 −µA Logic VIL LOW-level input voltage VSS − 0.3VDD V VIH HIGH-level input voltage 0.7VDD − VDD V IL leakage current VI =VDD or VSS −1 − +1 µA Column and row outputs Rcol output resistance of columns C0 to C101 VLCD = 7.6 V − 12 20 k Ω Rrow output resistance of rows R0 to R64 VLCD = 7.6 V − 12 20 k Ω Vcol bias tolerance voltage of columns C0 to C101 −100 0 +100 mV Vrow bias tolerance voltage of rows R0 to R64 −100 0 +100 mV LCD supply voltage generator ∆V LCD tolerance of internally generated VLCD VDD = 2.8 V; VLCD = 7.6 V; no serial clock; Tamb =25 °C; display load is 10 µA; notes 5 and 6 −300 0 +300 mV TC0 VLCD temperature coefficient 0 note 7 − 0 × 10−3VLCD − V/ °C |
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