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IDT79RC32134 Datasheet(PDF) 3 Page - Integrated Device Technology |
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IDT79RC32134 Datasheet(HTML) 3 Page - Integrated Device Technology |
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3 / 25 page  3 of 25 April 9, 2001 IDT79RC32134 As a PCI master, the RC32134 can generate memory, I/O, or config- uration cycles for direct local-to-PCI bus accesses. The PCI interface incorporates a 3-slot PCI bus arbiter, which includes fixed and round robin arbitration modes. As a PCI target, the RC32134 allows access to its internal registers and to the RISCore32300 local bus through the PCI I/O read and write, or Memory read and write commands. The RC32134 PCI interface supports swapping little endian data to big endian, when the CPU subsystem is configured as a big endian system. For more information on the PDCI interface, please refer to the PCI Specification, Revision 2.1. DMA Controller. Four general purpose DMA channels move data between source and destination ports. Source and destination ports can be system memory, PCI or I/O devices. Any of the four channels can be used for PCI initiator reads or writes. All four channels support a descriptor structure, to allow efficient data scatter/gather. The DMA controller supports swapping of data between big and little endian memory and I/O subsystems by memory region. It also supports quad- word burst transfers. All external 16 and 8-bit memory I/Os are treated as memory-mapped, word-aligned devices. Expansion Interrupt Controller. The Expansion Interrupt Controller provides the interrupt logic for software to analyze the various RC32134 generated system interrupts and adds to the control already provided through the CP0 registers of the RC32364. Each system interrupt is registered and the pending status provided through this feature. The pending status can then be used to automatically generate a hardware interrupt to the CPU via individual mask bits. The pending interrupt status can also be optionally set or cleared by a direct software write. PIO. Programmable I/O (PIO) pins are provided on the RC32134 so that any unused peripheral pins can be programmed for use as general purpose discrete I/O pins. These PIO pins can be software programmed as bidirectional lines, allowing pin values to be software programmed in output mode and software readable while in the input mode. The PIO pins can also be used as a source of interrupts to the CPU. Maximum Interfacing flexibility is thus provided without requiring extensive modifi- cations to the board. UART. The RC32134 incorporates two 16550 (an enhanced version of the 16450) compatible UARTs. To relieve the CPU of software over- head, the 16550 UART can be put into FIFO mode, allowing execution of either 16450 or 16550 compatible software. Two sets of 16-byte FIFOs are enabled during the 16550 mode: one set in the receive data path and one set in the transmit data path. A baud rate generator is included that divides the system clock by 1 to 64K and provides a 16X clock for driving the transmitter and receiver logic. Timers/Counters. Three on-chip 32-bit general purpose Timers are provided on the RC32134. Each timer consists of both a count and a compare register. The count register resets to zero and then counts upward until it equals the compare register. When the count and compare registers are equal, the TC_n output is asserted and the count is then reset to zero. JTAG. Board-level manufacturing debugging is facilitated through implementation of a fully compliant IEEE std. 1149.1 JTAG Boundary Scan interface. Thermal Considerations Thermal Considerations Thermal Considerations Thermal Considerations The RC32134 is guaranteed in a case temperature range of 0 °C to +90 °C, for commercial temperature devices; - 40°C to +90°C for indus- trial temperature devices. The speed (power) of the device and airflow conditions affect the equivalent ambient temperature conditions that will meet this specification. The equivalent allowable ambient temperature, TA, can be calculated using the thermal resistance from case to ambient ( ∅CA) of the given package. The following equation relates ambient and case temperatures: TA = TC - P * ∅CA where P is the maximum power consumption at hot temperature, calculated by using the maximum ICC specification for the device. Typical values for ∅CA at various airflows are shown in Table 1 Revision History: Revision History: Revision History: Revision History: July 21, 1999: Changed the following: Thermal Resistance values; Table 2, Pin Descriptions; Logic diagram - RC32134; Clock parameter temperature from 85 to 90 degrees; AC timing characteristics - RC32134; DC elec- trical characteristics; Power consumption - RC32134; Absolute maximum ratings diagram; Pin-out 208-PQFP table; RC32134 alternate signal functions. September 2, 1999: Corrected package drawing from 144-pin to 208-pin. November 1, 1999: Removed Maximum column from Power Consumption table. November 9, 1999: Moved pin 208 (sdram_245_oe_n) from Low drive to High drive in DC Electrical Characteristics Table. April 28, 2000: Added Mode Configuration Interface Reset Sequence figure on page 14. ∅CA Airflow (ft/min) 0 200 400 600 800 1000 208 PQFP 18 14 11 9 8 7 Table 1 Thermal Resistance ( ∅CA) at Various Airflows |
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