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DT72V3674L10PF Datasheet(PDF) 6 Page - Integrated Device Technology |
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DT72V3674L10PF Datasheet(HTML) 6 Page - Integrated Device Technology |
6 / 37 page 6 COMMERCIALTEMPERATURERANGE IDT72V3654/72V3664/72V3674 3.3V CMOS SyncBiFIFOTM WITH BUS-MATCHING 2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2 Symbol Name I/O Description W/ RA Port-AWrite/ I A HIGH selects a write operation and a LOW selects a read operation on Port A for a LOW-to-HIGH Read Select transition of CLKA. The A0-A35 outputs are in the HIGH impedance state when W/ RA is HIGH. W/RB Port-BWrite/ I A LOW selects a write operation and a HIGH selects a read operation on Port B for a LOW-to-HIGH Read Select transition of CLKB. The B0-B35 outputs are in the HIGH impedance state when W/RB is LOW. PIN DESCRIPTIONS (CONTINUED) |
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