1

AUGUST 2003

3.3 VOLT TIME SLOT INTERCHANGE

DIGITAL SWITCH

256 x 256

IDT72V8980

2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.

DSC-5705/5



FUNCTIONAL BLOCK DIAGRAM

Microprocessor Interface

Control Register

Timing

Unit

RX0

RX1

RX2

RX3

RX4

RX5

RX6

RX7

TX0

TX1

TX2

TX3

TX4

TX5

TX6

TX7

ODE

F0i

C4i

CS

DS

R/

W A0

A5/

GND

CCO

DTA D0/

D5

5705 drw01

Receive

Serial Data

Streams

Data

Memory

Output MUX

Connection

Memory

Transmit

Serial Data

Streams

FEATURES:

Small Shrink Outline Package (SSOP), and 44-pin Plastic Quad

Flatpack (PQFP)

°°°°°C to +85°°°°°C

DESCRIPTION:

microprocessor. The IDT72V8980 can handle as many as 256, 64 Kbit/s input

and output channels. Those 256 channels are divided into 8 serial inputs and

outputs, each of which consists of 32 channels (64 Kbit/s per channel) to form

a multiplexed 2.048 Mb/s stream.

FUNCTIONAL DESCRIPTION

A functional block diagram of the IDT72V8980 device is shown on below.

arrangedin125

µswideframeseachcontaining32,8-bitchannels. Eightinput

(RX0-7) and eight output (TX0-7) serial streams are provided in the

IDT72V8980 device allowing a complete 256 x 256 channel non-blocking

switch matrix to be constructed. The serial interface clock (

C4i)forthedevice

is 4.096 MHz.

The received serial data is internally converted to a parallel format by the

on chip serial-to-parallel converters and stored sequentially in a 256-position

DataMemory.Byusinganinternalcounterthatisresetbytheinput8KHzframe

pulse,

F0i, the incoming serial data streams can be framed and sequentially

addressed.

NOTE:

1. The

RESET Input is only provided on the SSOP package.