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IDT72V8980 Datasheet(PDF) 3 Page - Integrated Device Technology |
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IDT72V8980 Datasheet(HTML) 3 Page - Integrated Device Technology |
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3 Commercial Temperature Range IDT72V8980 3.3V Time Slot Interchange Digital Switch 256 x 256 PIN DESCRIPTIONS SYMBOL NAME I/O DESCRIPTION GND Ground. Ground Rail. VCC VCC +3.3 Volt Power Supply. DTA Data Acknowledgment O This active LOW output indicates that a data bus transfer is complete. A pull-up resistor is required at this (Open Drain) output. RX0-7 RX Input 0 to 7 I Serial data input streams. These streams have 32 channels at data rates of 2.048 Mb/s. F0i Frame Pulse I This input identifies frame synchronization signals formatted to ST-BUS® specifications. C4i Clock I 4.096 MHz serial clock for shifting data in and out of the data streams. A0-A5 Address 0 to 5 I These lines provide the address to IDT72V8980 internal registers. DS Data Strobe I This is the input for the active HIGH data strobe on the microprocessor interface. This input operates with CS to enable the internal read and write generation. R/ W Read/Write I This input controls the direction of the data bus lines (D0-D7) during a microprocessor access. CS Chip Select I Active LOW input enabling a microprocessor read or write of control register or internal memories. D0-D7 Data Bus 0 to 7 I/O These pins provide microprocessor access to data in the internal control register. Connection Memory HIGH, Connection Memory LOW and data memory. TX0-7 TX Outputs 0 to 7 O Serial data output streams. These streams are composed of 32, 64 Kbit/s channels at data rates of 2.048 Mb/s. ODE Output Drive Enable I This is an output enable for the TX0-7 serial outputs. If this input is LOW, TX0-7 are high-impedance. If this is HIGH, each channel may still be put into high-impedance by software control. CCO Control Channel Output O This output is a 2.048 Mb/s line which contains 256 bits per frame. The level of each bit is controlled by the contents of the CCO bit in the Connection Memory HIGH locations. RESET Device Reset I This input (active LOW) puts the IDT72V8980 in its reset state that clears the device internal counters, (Schmitt Trigger Input) registers and brings TX0-7 and microport data outputs to a high-impedance state. The time constant for a power up reset circuit must be a minimum of five times the rise time of the power supply. In normal operation, the RESET pin must be held LOW for a minimum of 100ns to reset the device. |
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