Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

CY28346 Datasheet(PDF) 6 Page - Cypress Semiconductor

Part No. CY28346
Description  Clock Synthesizer with Differential CPU Outputs
Download  20 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
Logo 

CY28346 Datasheet(HTML) 6 Page - Cypress Semiconductor

Zoom Inzoom in Zoom Outzoom out
 6 / 20 page
background image
CY28346
Document #: 38-07331 Rev. *B
Page 6 of 20
Dial-a-Frequency Features
SMBus Dial-a-Frequency feature is available in this device via
Byte8 and Byte9.
P is a large-value PLL constant that depends on the frequency
selection achieved through the hardware selectors (S1, S0). P
value may be determined from Table 2.
Dial-a-dB Features
SMBus Dial-a-dB feature is available in this device via Byte8
and Byte9.
Spread Spectrum Clock Generation (SSCG)
Spread Spectrum is a modulation technique used to
minimizing EMI radiation generated by repetitive digital
signals. A clock presents the greatest EMI energy at the center
frequency it is generating. Spread Spectrum distributes this
energy over a specific and controlled frequency bandwidth
therefore causing the average energy at
any one point in this band to decrease in value. This technique
is achieved by modulating the clock away from its resting
frequency by a certain percentage (which also determines the
amount of EMI reduction). In this device, Spread Spectrum is
enabled by setting specific register bits in the SMBus control
bytes. Table 3 is a listing of the modes and percentages of
Spread Spectrum modulation that this device incorporates.
Test and Measurement Set-up
For Differential CPU Output Signals
The following diagram shows lumped test load configurations
for the differential Host Clock Outputs.
Table 2. P Value
S(1:0)
P
0 0
32005333
0 1
48008000
1 0
96016000
1 1
64010667
Table 3. Spread Spectrum
SS2
SS1
SS0
Spread Mode
Spread%
0
0
0
Down
+0.00, –0.25
0
0
1
Down
+0.00, –0.50
0
1
0
Down
+0.00, –0.75
0
1
1
Down
+0.00, –1.00
1
0
0
Center
+0.13, –0.13
1
0
1
Center
+0.25, –0.25
1
1
0
Center
+0.37, –0.37
1
1
1
Center
+0.50, –1.50
M ea surem ent P o in t
2p F
CP U T
M U LT SEL
T
PC B
T
PC B
CP U C
220Ω
63.4Ω
63.4Ω
475Ω
33.2Ω
33.2Ω
M e asu rem en t P oint
2pF
Figure 1. 1.0V Test Load Termination
CPUT
MULTSEL
T
PCB
T
PCB
CPUC
33Ω
33Ω
Measurement Point
49.9Ω
49.9Ω
2pF
Measurement Point
2pF
475Ω
VDD
Figure 2. 0.7V Test Load Termination


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn