8 / 17 page
CY7C4421V/4201V/4211V/4221V
CY7C4231V/4241V/4251V
Document #: 38-06010 Rev. *A
Page 8 of 17
Switching Characteristics Over the Operating Range
Parameter
Description
7C42X1V-15
7C42X1V-25
7C42X1V-35
Unit
Min.
Max.
Min.
Max.
Min.
Max.
tS
Clock Cycle Frequency
66.7
40
28.6
MHz
tA
Data Access Time
2
11
2
15
2
20
ns
tCLK
Clock Cycle Time
15
25
35
ns
tCLKH
Clock HIGH Time
6
10
14
ns
tCLKL
Clock LOW Time
6
10
14
ns
tDS
Data Set-Up Time
4
6
7
ns
tDH
Data Hold Time
1
2
2
ns
tENS
Enable Set-Up Time
4
6
7
ns
tENH
Enable Hold Time
1
2
2
ns
tRS
Reset Pulse Width[9]
15
25
35
ns
tRSS
Reset Set-Up Time
10
15
20
ns
tRSR
Reset Recovery Time
10
15
20
ns
tRSF
Reset to Flag and Output Time
18
25
35
ns
tOLZ
Output Enable to Output in Low Z[10]
00
0
ns
tOE
Output Enable to Output Valid
3
8
3
12
3
15
ns
tOHZ
Output Enable to Output in High Z[10]
383
12
3
15
ns
tWFF
Write Clock to Full Flag
11
15
20
ns
tREF
Read Clock to Empty Flag
11
15
20
ns
tPAF
Clock to Programmable Almost-Full Flag
16
22
25
ns
tPAE
Clock to Programmable Almost-Full Flag
16
22
25
ns
tSKEW1
Skew Time between Read Clock and Write Clock
for Empty Flag and Full Flag
610
12
ns
tSKEW2
Skew Time between Read Clock and Write Clock
for Almost-Empty Flag and Almost-Full Flag
15
18
20
ns
Notes:
9.
Pulse widths less than minimum values are not allowed.
10. Values guaranteed by design, not currently tested.
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
