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UCC27424P Datasheet(PDF) 2 Page - Texas Instruments

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Part # UCC27424P
Description  DUAL 4-A HIGH SPEED LOW SIDE MOSFET DRIVERS WITH ENABLE
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

UCC27424P Datasheet(HTML) 2 Page - Texas Instruments

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UCC27423, UCC27424, UCC27425
SLUS545B − NOVEMBER 2002 − REVISED NOVEMBER 2004
2
www.ti.com
ORDERING INFORMATION
OUTPUT
TEMPERATURE RANGE
PACKAGED DEVICES
OUTPUT
CONFIGURATION
TEMPERATURE RANGE
TA = TJ
SOIC-8 (D)
MSOP-8 PowerPAD
(DGN)
}
PDIP-8 (P)
Dual inverting
−40
°C to +105°C
UCC27423D
UCC27423DGN
UCC27423P
Dual nonInverting
−40
°C to +105°C
UCC27424D
UCC27424DGN
UCC27424P
One inverting,
one noninverting
−40
°C to +105°C
UCC27425D
UCC27425DGN
UCC27425P
† D (SOIC−8) and DGN (PowerPAD−MSOP) packages are available taped and reeled. Add R suffix to device type (e.g. UCC27423DR,
UCC27424DGNR) to order quantities of 2,500 devices per reel for D or 1,000 devices per reel for DGN package.
‡ The PowerPAD
is not directly connected to any leads of the package. However, it is electrically and thermally connected to the substrate which
is the ground of the device.
D, DGN, OR P PACKAGE
(TOP VIEW)
D, DGN, OR P PACKAGE
(TOP VIEW)
D, DGN, OR P PACKAGE
(TOP VIEW)
ENBA
INA
GND
INB
ENBB
OUTA
VDD
OUTB
8
7
6
5
1
2
3
4
ENBA
INA
GND
INB
ENBB
OUTA
VDD
OUTB
8
7
6
5
1
2
3
4
ENBA
INA
GND
INB
ENBB
OUTA
VDD
OUTB
8
7
6
5
1
2
3
4
(DUAL INVERTING)
(DUAL NON−INVERTING)
(ONE INVERTING AND
ONE NON−INVERTING)
UCC27423
UCC27424
UCC27425
power dissipation rating table
PACKAGE
SUFFIX
Θjc (°C/W)
Θja (°C/W)
Power Rating (mW)
TA = 70°C See Note 1
Derating Factor Above
70
°C (mW/5C) See
Note 1
SOIC-8
D
42
84 – 160
}
344−655 See Note 2
6.25 − 11.9 See Note 2
PDIP-8
P
49
110
500
9
MSOP PowerPAD-8
See Note 3
DGN
4.7
50 − 59
}
1370
17.1
Notes: 1. 125
°C operating junction temperature is used for power rating calculations
2. The range of values indicates the effect of pc−board. These values are intended to give the system designer an indication of the
best and worst case conditions. In general, the system designer should attempt to use larger traces on the pc−board where possible
in order to spread the heat away form the device more effectively. For information on the PowerPAD
t package, refer to Technical
Brief, PowerPad Thermally Enhanced Package, Texas Instrument s Literature No. SLMA002 and Application Brief, PowerPad Made
Easy, Texas Instruments Literature No. SLMA004.
3. The PowerPAD
is not directly connected to any leads of the package. However, it is electrically and thermally connected to the
substrate which is the ground of the device.
Table 1. Input/Output Table
INPUTS (VIN_L, VIN_H)
UCC27423
UCC27424
UCC27425
ENBA
ENBB
INA
INB
OUTA
OUTB
OUTA
OUTB
OUTA
OUTB
H
H
L
L
H
H
L
L
H
L
H
H
L
H
H
L
L
H
H
H
H
H
H
L
L
H
H
L
L
L
H
H
H
H
L
L
H
H
L
H
L
L
X
X
L
L
L
L
L
L


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