NCP5252MNTXG datasheet(6/16 Pages) ONSEMI

Part #	NCP5252MNTXG

Description	2.0 A, 1.0 MHz Integrated Synchronous Buck Regulator with Light Load Efficiency

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NCP5252

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ELECTRICAL CHARACTERISTICS (VCC = 4.5 to 13.2 V, TA = −40°C to 85°C, unless other noted)

Characteristics

Unit

Max

Typ

Min

Test Conditions

Symbol

SWITCHING MODULATOR

Minimum Ton

Ton_min

(Note 1)

40

50

60

ns

Minimum Toff

Toff_min

(Note 1)

200

225

250

ns

PWM Comparator Offset

(Note 1)

5.0

10

mV

Propagation Delay of PWM

Comparator

TD_PWM

(Note 1)

20

ns

VOLTAGE ERROR AMPLIFIER

DC Gain

GAIN_VEA

(Note 1)

80

88

dB

Open−Loop Phase Margin

PH_EA

(Note 1)

50

Deg

Unity Gain Bandwidth

BW_VEA

(Note 1)

15

20

MHz

Slew Rate

SR_VEA

COMP PIN TO GND = 100 pF

(Note 1)

5.0

V/ms

FB Bias Current

Ibias_FB

0.1

mA

Output Voltage Swing

Vmax_EA

Isource_EA = 2mA

3.3

3.5

V

Vmin_EA

Isink_EA = 2mA

0.15

0.3

V

OVERCURRENT PROTECTION LIMIT

High Side Peak Current Limit

(Cycle−by−Cycle)

HSOC

Ton Minimum > 100 ns

(Notes 1 & 2)

3.4

4.0

4.6

A

Low Side Valley Current Limit,

Short−Circuit (4 ms)

LSOC_S

(Notes 1 & 2)

3.0

3.75

4.5

A

Low Side Valley Current Limit

(Current Limit, 16 ms)

LSOC_L

(Notes 1 & 2)

2.0

2.5

3.4

A

POWER OUTPUT SECTION

Internal Main FET ON−Resistance

RDS(on)_M

(ILX=100mA, VBST−LX = 5 V,

FB = 0, TA = 25°C) (Note 1)

150

225

mW

Internal Sync FET ON−Resistance

RDS(on)_F

(ILX = 100 mA, FB = 1 V, TA = 25°C)

(Note 1)

100

150

mW

LX Leakage Current

LX_LK

VEN = 0V, LX = 0, VCC = 13.2 V

+5.0

mA

LX = 13.2, VCC = 13.2 V

−5.0

mA

CONTROL SECTION

EN / SKIP Logic Input Voltage for

Disable

VEN_DISABLE

Set as Disable

0.7

1.0

1.3

V

VEN_HYS

Hysteresis

300

mV

EN / SKIP Logic Input Voltage for

FPWM

VEN_FPWM

Set as FCCM mode

1.7

1.95

2.10

V

EN / SKIP Logic Input Voltage for

Skip Mode

VEN_SKIP

Set as SKIP Mode

2.25

2.45

2.65

V

VEN_HYS

Hysteresis

250

mV

EN / SKIP Source Current

IEN_SOURCE

VEN_SKIP = 0 V

0.1

mA

EN / SKIP Sink Current

IEN_SINK

VEN_SKIP = 5 V

0.1

mA

EN_SKIP Logic Input Delay

Change mode delay active

3

Clk

PGOOD Pin ON Resistance

PGOOD_R

I_PGOOD = 5 mA

75

W

PGOOD Pin OFF Current

PGOOD_LK

PGOOD = 5 V

1

mA

OUTPUT DISCHARGE MODE

Output Discharge On−Resistance

Rdischarge

EN = 0 V

20

35

W

THERMAL SHUTDOWN

Thermal Shutdown

Tsd

(Note 1)

150

°C

Thermal Shutdown Hysteresis

Tsdhys

(Note 1)

25

°C

1. Guaranteed by design, not tested in production.

2. Test mode disables the Ton/Toff min.

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