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NCP1615 Datasheet(PDF) 30 Page - ON Semiconductor |
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NCP1615 Datasheet(HTML) 30 Page - ON Semiconductor |
30 / 46 page NCP1615 www.onsemi.com 30 Figure 28. OTP Auto−Recovery Timing Diagram STANDBY OPERATION A signal proportional to the downstream converter output power is applied to the STDBY pin to enable standby mode operation. A STDBY voltage below the standby threshold, Vstandby, typically 300 mV, forces the controller into a controlled burst mode, or standby mode. In standby mode, the driver is disabled until the bulk voltage falls below the bulk restart level. At which point, the driver is re−enabled. The bulk restart level determines the minimum bulk voltage in standby mode. As long as the STBY pin voltage is below the standby threshold, the controller will operate in controlled burst mode. The controller is not allowed to enter standby mode while the PFCOK signal is low. A dedicated timer, tblank(STDBY), blanks the standby signal for 1 ms (typically) right after the PFCOK signal transitions high. This ensures the signal proportional to the downstream converter output power has enough time to build up and prevent disabling the PFC while powering up the downstream converter. The standby circuit block is shown in Figure 29. Figure 29. Standby Circuit Block t blank(STDBY) In_Regulation Vstandby STDBY Q DRV Disable S R PFC_OK 0.98*VREF Restart IRestart VUVP3 UVP3 ADJUSTABLE BULK VOLTAGE HYSTERESIS The bulk restart threshold allows the user to enable the bulk level at which the controller exits standby mode. The restart threshold is set at 2% below the internal reference, VREF. The ratio between VREF and the restart level is given by KRestart. The user can set a restart level of 2% below the regulation level without using additional components as shown in Figure 30. If a different restart level is desired, a resistor network can be used as shown in Figure 31. Figure 30. Minimum Restart Level Configuration |
Similar Part No. - NCP1615_16 |
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Similar Description - NCP1615_16 |
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