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SY89834U Datasheet(PDF) 2 Page - Micrel Semiconductor |
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SY89834U Datasheet(HTML) 2 Page - Micrel Semiconductor |
2 / 10 page 2 PRELIMINARY Precision Edge™ SY89834U Micrel PACKAGE/ORDERING INFORMATION Ordering Information Package Operating Package Part Number Type Range Marking SY89834UMI MLF-16 Industrial 834U SY89834UMITR* MLF-16 Industrial 834U *Tape and Reel Pin Number Pin Name Pin Function 15, 16 (Q0, /Q0) to LVPECL Differential (Outputs): Terminate to VCC–2V. See “Termination Recommendations” 1, 2, 3, 4, 5, 6 (Q3, /Q3) section. Unused outputs may be left floating without impacting jitter and skew. 8 EN TTL/CMOS Compatible Synchronous Enable: When EN goes LOW, Q outputs will go LOW and /Q outputs will go HIGH on the next LOW transition at IN inputs. Input threshold is VCC/2V. Includes a 25kΩ pull-up resistor. Default state is HIGH when left floating. The internal latch is clocked on the falling edge of the input signal (IN1, IN2). 9, 12 IN2, IN1 TTL/CMOS Compatible Data/Clock (Inputs): IN1 and IN2 include a 25k Ω pull-up resistor. The default state is HIGH when left floating. 10 NC No Connect. Not internally connected. 11 SEL TTL/CMOS Compatible Select Input for signals IN1 and IN2. The input threshold is VCC/2V. HIGH at the SEL input selects signal IN1. LOW at the SEL input selects signal IN2. SEL includes a 25k Ω pull-up resistor. The default state is HIGH when left floating. 13, GND Ground. Exposed pad internally connected to GND and must be connected to a ground plane Exposed Pad for proper termination. 7, 14 VCC Positive Power Supply: Connect VCC pins together on the PCB to maintain the same potential. Bypass with 0.1 µF//0.01µF low ESR capacitors. PIN DESCRIPTION 1 2 3 4 12 11 10 9 16 15 14 13 5678 Q1 /Q1 Q2 /Q2 IN1 SEL NC IN2 16-Pin MLF™ IN1 IN2 EN SEL Q0–Q3 /Q0–Q3 0 X 110 1 1 X 111 0 X 0100 1 X 1101 0 XX 0 X 0(1) 0(1) Note 1. On next negative transition of the input signal (IN). TRUTH TABLE |
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