Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

MN1959041 Datasheet(PDF) 8 Page - Panasonic Semiconductor

Part No. MN1959041
Description  COMMERCIAL MPEG-4 VIDEO CODEC IC FOR W-CDMA MOBILE VISUAL TERMINALS
Download  23 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  PANASONIC [Panasonic Semiconductor]
Homepage  http://www.panasonic.com/industrial/
Logo 

MN1959041 Datasheet(HTML) 8 Page - Panasonic Semiconductor

Zoom Inzoom in Zoom Outzoom out
 8 / 23 page
background image
MN1959041
8
SDM00008AEM
s Functional Description (continued)
8. DBC (Debug Controller) Block
MN1959041 provides its own debugging mode functions, and, when it is in HOLD mode, provides functions for
reading and writing internal registers and memory, setting MP breakpoints, and other debugging operations. These
functions can contribute to improved efficiency when debugging actual end products, and improved efficiency in
system debugging.
The IC provides the following functions in debug mode.
• Read and write operation to internal registers
• Read and write operation to internal memory spaces
• Read and write operation to internal DRAM
• Breakpoint setting functions
PC value break
DM1 address break
DM2 address break
GM address break
CM address break
• PC trace function
1-bit trace
7-bit trace
9. Operating States and State Transition Control
MN1959041 has 4 operating states: RUN, HOLD, SLEEP, and WAIT.
RUN mode is the state where the program is executing, and HOLD mode is the state where program execution is
stopped. SLEEP mode and WAIT mode are both program stopped states, but WAIT mode is a state that waits for the
completion of specific processing (specified by the program) and switches to RUN mode automatically at the point
completion is verified.
Of these four modes, HOLD mode can be used for program debugging, and allows the IC internal memory
(instruction memory and data memory) to be read and written from external circuits.
The IC is started externally by clearing a reset applied with an external pin (the NVRST pin). After startup, the IC
can be stopped and restarted with an external pin (the VHOLD pin).
The IC operating state can be observed from the VST[2:0] pins. Table 6 lists the processor states as indicated by these
pins.
Always set the IC to HOLD mode before accessing internal resources when debugging. Operation is not guaranteed
if resources are accessed in other modes.
Table 6. Internal Operating States
VST[2]
VST[1]
VST[0]
RUN mode
Low
Low
Low
HOLD mode
For the RUN to HOLD transition
High
Low
Low
For the SLEEP to HOLD transition
High
High
Low
For the WAIT to HOLD transition
High
Low
High
SLEEP mode
Low
High
Low
WAIT mode
Low
Low
High


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn