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PTB78560BAS Datasheet(PDF) 5 Page - Texas Instruments |
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PTB78560BAS Datasheet(HTML) 5 Page - Texas Instruments |
5 / 27 page www.ti.com PTB78560A ELECTRICAL CHARACTERISTICS PTB78560A, PTB78560B PTB78560C SLTS249 – JUNE 2005 (Unless otherwise stated, T A = 25°C, VI = 24 V, VO = 5 V, CO = 220 µF, and IO = IOmax) PTB78560A PARAMETER TEST CONDITIONS UNIT MIN TYP MAX IO Output current Over VI range IO Bus 0.25 (1) 6 (2) A VI Input voltage range Over IO range 18 24 60 V Set-point voltage tolerance ±1 (3) %VO Temperature variation -40°C ≤ T A ≤ 85°C ±0.5 %VO Line regulation Over VI range ±0.2 ±1 %VO VO Load regulation Over IO range ±0.4 ±1 %VO Total output voltage variation Includes set-point, line, load, –40°C ≤ T A ≤ 85°C ±2 ±3 (3) %VO Adjust range Over VI range 3.6 5.5 V η Efficiency RSET = 14.3 kΩ, VO =5 V 83% VO Ripple (peak-to-peak) 20-MHz bandwidth 1 %VO 0.1 A/µs load step, Recovery time 100 µs Transient response 50% to 100% VO over/undershoot ±200 mV IOmax Input current Track connected to -Sense –0.2 mA Track input (pin 5) Open-circuit voltage 0 VO Bus Referenced to -VI Input high voltage (VIH) 2 Open (4) V Output enable inputs (pins 2, 3) Input low voltage (VIL) -0.2 0.8 Input low current (IIL) –0.8 mA Standby input current Pins 2 and 3 open 8 16 mA IO Bus Overcurrent threshold Shutdown, followed by autorecovery 9 A VI increasing 17 UVLO Undervoltage lockout V VI decreasing 16 ƒ S Switching frequency Over VI range 400 500 600 kHz Internal input capacitance 1 µF External input capacitance Between +VI and –VI 100 µF External output capacitance Between both outputs and VO COM 220 5,000 µF Isolation voltage Input-output 1,500 Vdc Isolation capacitance Input-output 2,000 pF Isolation resistance Input-output 10 M Ω Telcordia SR-332 50% stress, TA = 40°C, ground MTBF Reliability 3.6 106 Hr benign (1) The converter requires a minimum load current for proper operation. The converter is not damaged when operated under a no-load condition. (2) See temperature derating curves for safe operating area (SOA), to determine output current derating at elevated ambient temperatures. (3) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1%, with 100 ppm/°C temperature stability. (4) The PEN and NEN inputs each have an internal pullup resistor. If the enable feature is not used, the PEN input (pin 2) should be left open circuit and the NEN input (pin 3) permanently connected to –VI. A discrete MOSFET or bipolar transistor is recommended for the enable control. The open-circuit voltage is less than 10 V. See the Application Information for a more detailed description. 5 Submit Documentation Feedback |
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