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PLL1708DBQR Datasheet(PDF) 4 Page - Texas Instruments |
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PLL1708DBQR Datasheet(HTML) 4 Page - Texas Instruments |
4 / 25 page PLL1707 PLL1708 SLES065 – DECEMBER 2002 www.ti.com 4 ELECTRICAL CHARACTERISTICS (continued) all specifications at TA = 25°C, VDD1–VDD3 (= VDD) = VCC = 3.3 V, fM = 27 MHz, crystal oscillation, fS = 48 kHz (unless otherwise noted) PARAMETER UNIT MAX TYP MIN TEST CONDITIONS Output clock jitter (5) SCKO0, SCKO1 58 100 ps Output clock jitter (5) SCKO2, SCKO3 50 100 ps Frequency Settling Time(7) PLL1707, to stated output frequency 50 150 ns Frequency Settling Time(7) PLL1708, to stated output frequency 80 300 ns Power-up time (8) To stated output frequency 3 6 ms POWER SUPPLY REQUIREMENTS VCC, VDD Supply voltage range 2.7 3.3 3.6 Vdc IDD +ICC Supply current (9) VDD = VCC = 3.3 V, fS = 48 kHz 19 25 mA IDD + ICC Supply current (9) Power down(10) 350 550 µA Power dissipation VDD = VCC = 3.3 V, fS = 48 kHz 63 90 mW TEMPERATURE RANGE Operating temperature –25 85 °C θJA Thermal resistance PLL1707/8DBQ: 20-pin SSOP (150 mil) 150 °C/W (1) Pins 5, 6, 7, 12: FS1/MD, FS2/MC, SR/MS, CSEL (Schmitt-trigger input with internal pulldown, 3.3-V tolerant) (2) Pins 2, 3, 14, 15, 18, 19: SCKO2, SCKO3, MCKO1, MCKO2, SCKO0, SCKO1 (3) Pin 10: XT1 (4) Pin 11: XT2 (5) Jitter performance is specified as standard deviation of jitter for 27-MHz crystal oscillation and default SCKO frequency setting. Jitter performance varies with master clock mode, SCKO frequency setting and load capacitance on each clock output. (6) The delay time from power on to oscillation (7) The settling time when the sampling frequency is changed (8) The delay time from power on to lockup (9) fM = 27-MHz crystal oscillation, no load on MCKO1, MCKO2, SCKO0, SCKO1, SCKO2, SCKO3. Power supply current varies with sampling frequency selection and load condition. (10) While all bits of CE[6:1] are 0, the PLL1708 goes into power-down mode. PIN ASSIGNMENTS 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VDD1 SCKO2 SCKO3 DGND1 FS1 FS2 SR VCC AGND XT1 VDD3 SCKO1 SCKO0 DGND3 DGND2 MCKO2 MCKO1 VDD2 CSEL XT2 PLL1707 (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VDD1 SCKO2 SCKO3 DGND1 MD MC MS VCC AGND XT1 VDD3 SCKO1 SCKO0 DGND3 DGND2 MCKO2 MCKO1 VDD2 CSEL XT2 PLL1708 (TOP VIEW) |
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