ISL85412

4

FN8378.1

March 13, 2015

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Functional Block Diagram

GATE

DRIVE

AND

DEADTIME

BIAS

LDO

OSCILLATOR

PFM

CURRENT

SET

FAULT

LOGIC

450mV/T SLOPE

COMPENSATION

(PWM ONLY)

930mV/A

CURRENT

SENSE

PWM/PFM

SELECT LOGIC

ZERO CURRENT

DETECTION

PWM

PWM

600mV VREF

150k

54pF

INTERNAL

COMPENSATION

s

R

Q

Q

POWER-

GOOD

LOGIC

FB

INTERNAL = 50µs

5M

5M

PGND

PHASE

BOOT

VCC

VIN

EN

FB

MODE

PG

GND

PACKAGE

PADDLE

EN/SOFT-

START

FB

Ordering Information

PART NUMBER

(Notes 1, 2, 3)

PART

MARKING

TEMP. RANGE

(°C)

PACKAGE

(RoHS Compliant)

PKG.

DWG. #

ISL85412FRTZ

5412

-40 to +125

8 Ld TDFN

L8.3x3H

ISL85412EVAL1Z

Evaluation Board

ISL85412DEMO1Z

Demonstration Board

NOTES:

1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte

tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil

Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for ISL85412. For more information on MSL please see techbrief TB363.