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GS9075B Datasheet(PDF) 22 Page - Semtech Corporation |
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GS9075B Datasheet(HTML) 22 Page - Semtech Corporation |
22 / 28 page GS1575B / GS9075B HD-LINX® II Multi-Rate SDI Automatic Reclocker Data Sheet 40063 - 1 June 2009 22 of 28 4.11 Output Drivers and Serial Clock Outputs The device’s serial digital data outputs (DDO/DDO) have a nominal voltage of 800mv single ended or 1600mV differential when terminated into a 50Ω load. The GS1575B/9075B may also be configured to output a serial clock at the data output rate. The internal serial clock output block is powered via the SCO_ENABLE pin. When SCO_ENABLE is connected to VCC, a differential serial clock output will be present on SCO/SCO. Otherwise, when SCO_ENABLE is connected to GND, the clock output block will be powered down and the device will have reduced power consumption. NOTE: The SCO_ENABLE signal should have a 1.5mA drive strength to maintain a supply voltage of 3.3 +/- 0.165V. Clock and data alignment is shown in Figure 4-5. Figure 4-5: Clock and Data Alignment 4.12 Output Mute The DDO_MUTE pin is provided to allow muting of the re-timed output. When the PLL is locked and the device is reclocking, setting DDO_MUTE = LOW will force the serial digital outputs DDO/DDO to mute. However, if the GS1575B/9075B is in Bypass mode, (AUTOBYPASS = HIGH and/or BYPASS = HIGH), DDO_MUTE will have no effect on the output. DATA SCLK t CD For HD-SDI: tCD = 32ps (typ.), 36ps (max.) For SD-SDI: t CD = 30ps (typ.), 38ps (max.) |
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