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CY25100
Document #: 38-07499 Rev. *D
Page 10 of 11
© Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
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CyberClocks is a trademark of Cypress Semiconductor. All product and company names mentioned in this document are the
trademarks of their respective holders.
Package Diagrams (continued)
8
PIN1ID
SEATING
PLANE
1
BSC.
BSC
0°-8°
PLANE
GAUGE
2.90[0.114]
1.10[0.043] MAX.
0.65[0.025]
0.20[0.008]
0.05[0.002]
6.50[0.256]
0.076[0.003]
6.25[0.246]
4.50[0.177]
4.30[0.169]
3.10[0.122]
0.15[0.006]
0.19[0.007]
0.30[0.012]
0.09[[0.003]
0.25[0.010]
0.70[0.027]
0.50[0.020]
0.95[0.037]
0.85[0.033]
DIMENSIONS IN MM[INCHES] MIN.
MAX.
8-Lead Thin Shrunk Small Outline Package (4.40 MM Body) Z8
51-85093-*A
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