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SMJ320MCM42DHFNL40 Datasheet(PDF) 1 Page - Texas Instruments |
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SMJ320MCM42DHFNL40 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 18 page SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D -- JULY 1997 -- REVISED OCTOBER 2001 1 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251--1443 D Performance: -- 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules -- Zero-Wait-State Local Memory for Each Processor D Organization: -- 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) -- 256K-Word × 32-Bit SRAM (SMJ320MCM42C) D Compliant With MIL-PRF-38535 QML D Dual C40 Performance With Local Memory Requiring Only 8.7 Square Inches of Board Space D Enhanced Performance Offered By Multichip-Module Solution -- SMJ320MCM42C -- 67% Reduction in Number of Interconnects -- 54% Reduction (Minimum) in Board Area -- Estimated 38% Reduction in Power Dissipation Due to Reduced Parasitic Capacitance and Interconnect Lengths -- SMJ320MCM42D -- 56% Reduction in Number of Interconnects -- 30% Reduction (Minimum) in Board Area -- Estimated 20% Reduction in Power Dissipation Due to Reduced Parasitic Capacitance and Interconnect Lengths D Four Memory Ports for High Data Bandwidth -- Two Full 2G-Word External Buses D Two Internal Buses Mapped to Memory -- 128K-Word × 32-Bit SRAM for Each C40 Local Bus (SMJ320MCM42D) -- 256K-Word × 32-Bit SRAM for Each C40 Local Bus (SMJ320MCM42C) D Ten External Communication Ports for Direct Processor-to-Processor Communication D IEEE-1149.1† (JTAG) Boundary-Scan Compatible D 408-Lead Ceramic Quad Flatpack Package (HFN Suffix) D Operating Free-Air Temperature Ranges: --55°C to 125°C...(Military) 0°Cto70°C...(Commercial) D Communication-Port Connection Provided Between C40s for Interprocessor Communication Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. ‡ Terminal assignment information is provided by the terminal assignments table. Package is shown for pinout reference only. HFN PACKAGE‡ (TOP VIEW) 306 1 102 205 408 307 103 204 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2001, Texas Instruments Incorporated † IEEE Standard 1149.1--1990 Standard Test-Access Port and Boundary-Scan Architecture On products compliant to MIL-STD-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processingdoes notnecessarily include testing ofall parameters. |
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