TPS54294

SLVSB00D – OCTOBER 2011 – REVISED SEPTEMBER 2013

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POWERGOOD

The TPS54294 has power-good outputs that are measured on VFBx. The power-good function is activated after

the soft-start has finished. If the output voltage is within 16% of the target voltage, the internal comparator

detects the power good state and the power good signal becomes high after 1.5ms delay. During start-up, this

internal delay starts after 1.5ms of the UVP Enable delay time to avoid a glitch of the power-good signal. If the

feedback voltage goes outside of ±16% of the target value, the power-good signal becomes low after 2µs.

Over-Current Protection

he output over-current protection (OCP) is implemented using a cycle-by-cycle valley detection control circuit.

The switch current is monitored by measuring the low-side FET switch voltage between the SWx and PGNDx

pins. This voltage is proportional to the switch current and the on-resistance of the FET. To improve the

measurement accuracy, the voltage sensing is temperature compensated.

During the on-time of the high-side FET switch, the switch current increases at a linear rate determined by VINx,

VOx, the on-time and the output inductor value. During the on-time of the low-side FET switch, this current

low-side FET is above the voltage proportional to the current limit, the converter keeps the low-side switch on

until the measured voltage falls below the voltage corresponding to the current limit and a new switching cycle

begins. In subsequent switching cycles, the on-time is set to the value determined for CCM and the current is

monitored in the same manner.

Following are some important considerations for this type of over-current protection. The load current is one half

of the peak-to-peak inductor current higher than the over-current threshold. Also when the current is being

limited, the output voltage tends to fall as the demanded load current may be higher than the current available

from the converter. When the over current condition is removed, the output voltage returns to the regulated

value. This protection is non-latching.

Over/Under Voltage Protection

TPS54294 monitors the resistor divided feedback voltage to detect over and under voltage. If the feedback

voltage is higher than 120% of the reference voltage, the OVP comparator output goes high and the circuit

latches both the high-side MOSFET driver and the low-side MOSFET driver off. When the feedback voltage is

lower than 68% of the reference voltage, the UVP comparator output goes high and an internal UVP delay

counter begins counting. After 1.5ms, TPS54294 latches OFF both the high-side MOSFET and the low-side

MOSFET drivers. This function is enabled approximately 1.7 times the softstart time after power-on. The OVP

and UVP latch off is reset when EN is toggled.

UVLO Protection

than the UVLO threshold, the TPS54294 shuts down. As soon as the voltage increases above the UVLO

threshold, the converter starts again.

Thermal Shutdown

TPS54294 monitors its temperature. If the temperature exceeds the threshold value (typically 155°C), the device

shuts down. When the temperature falls below the threshold, the IC starts again.

When VIN1 starts up and VREG5 output voltage is below its nominal value, the thermal shutdown threshold is

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