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CD54HC194F3A Datasheet(PDF) 2 Page - Texas Instruments |
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CD54HC194F3A Datasheet(HTML) 2 Page - Texas Instruments |
2 / 13 page 2 Functional Diagram TRUTH TABLE OPERATING MODE INPUTS OUTPUT CP MR S1 S0 DSR DSL Dn Q0 Q1 Q2 Q3 Reset (Clear) X L X X X X X LLLL Hold (Do Nothing) X H l (Note 1) l (Note 1) X X X q0 q1 q2 q3 Shift Left ↑ H h l (Note 1) X l X q1 q2 q3 L ↑ H h l (Note 1) X h X q1 q2 q3 H Shift Right ↑ H l (Note 1) h l X X L q0 q1 q2 ↑ H l (Note 1) h h X X H q0 q1 q2 Parallel Load ↑ Hh h X X dn d0 d1 q2 d3 H = High Voltage Level, h = High Voltage Level One Set-up Time Prior To The Low to High Clock Transition, L = Low Voltage Level, l = Low Voltage Level One Set-up Time Prior to the Low to High Clock Transition, dn (qn) = Lower Case Letters Indicate the State of the Referenced Input (or output) One Set-up Time Prior to the Low To High Clock Transition, X = Don’t Care, ↑ = Transition from Low to High Level NOTE: 1. The High-to-Low transition of the S0 and S1 Inputs on the ’HC194 and CD74HCT194 should take place only while CP is High for Conventional Operation. 14 12 13 15 Q0 Q1 Q2 Q3 7 6 3 4 5 D0 D1 D2 D3 GND = 8 VCC = 16 2 9 10 1 11 DSL DSR S0 S1 MR CP CD54HC194, CD74HC194, CD74HCT194 |
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