CY54FCT273T, CY74FCT273T

8-BIT REGISTERS

SCCS020A – MARCH 1995 – REVISED OCTOBER 2001

1

POST OFFICE BOX 655303

With FCT and F Logic

of Equivalent FCT Functions

Significantly Improved Noise

Characteristics

Operation

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

Output Logic Levels

– 32-mA Output Sink Current

– 12-mA Output Source Current

– 64-mA Output Sink Current

– 32-mA Output Source Current

description

The

’FCT273T

devices

consist

of

eight

edge-triggered D-type flip-flops with individual

D inputs

and

Q

outputs.

The

common

buffered-clock (CP) and master-reset (MR) inputs

load and reset all flip-flops simultaneously. These

devices are edge-triggered registers. The state of

each D input (one setup time before the

low-to-high clock transition) is transferred to the

corresponding flip-flop’s Q output. All outputs are

forced low by a low logic level on the MR input.

This

device

is

fully

specified

for

circuitry

disables

the

outputs,

preventing

damaging current backflow through the device

when it is powered down.

Copyright

 2001, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

CY54FCT273T ...D PACKAGE

CY74FCT273T ...Q OR SO PACKAGE

(TOP VIEW)

CY54FCT273T . . . L PACKAGE

(TOP VIEW)

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MR

GND

CP

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