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TPS54122RHLT Datasheet(PDF) 8 Page - Texas Instruments |
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TPS54122RHLT Datasheet(HTML) 8 Page - Texas Instruments |
8 / 40 page 0 50 100 150 200 250 1 1.5 2 2.5 3 3.5 4 4.5 V BIAS - VOUT (V) 125°C 25°C -40°C C005 0 10 20 30 40 50 60 70 80 90 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 V LDOIN - VOUT (V) 1 kHz 100 kHz 1 MHz 10 MHz C022 0.776 0.784 0.792 0.8 0.808 0.816 0.824 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 V LDOIN - VOUT (V) 125°C 25°C -40°C C002 0.776 0.784 0.792 0.8 0.808 0.816 0.824 1 1.5 2 2.5 3 3.5 4 4.5 V BIAS - VOUT (V) 125°C 25°C -40°C C004 0.776 0.784 0.792 0.8 0.808 0.816 0.824 0 500 1,000 1,500 2,000 2,500 3,000 I OUT (mA) 125°C 25°C -40°C C001 0.776 0.784 0.792 0.8 0.808 0.816 0.824 0 10 20 30 40 50 I OUT (mA) 125°C 25°C -40°C C003 8 TPS54122 SBVS221B – NOVEMBER 2013 – REVISED AUGUST 2016 www.ti.com Product Folder Links: TPS54122 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated 6.8 Typical Characteristics At VVIN = VBIAS= VLDOEN= 5 V, VLDOIN = DC-DC_OUT = 2.1 V, VO = 1.8 V, IO = 50 mA, VEN = floating, COUT = 100 μF, and CSS = CNR = 0.01 µF (see Figure 27), unless otherwise noted. NOTE: Y-axis shows a 1% VOUT per division. Figure 1. Load Regulation NOTE: Y-axis shows a 1% VOUT per division. Figure 2. Load Regulation Under Light Loads NOTE: Y-axis shows a 1% VOUT per division. Figure 3. LDOIN Line Regulation NOTE: Y-axis shows a 1% VOUT per division. Figure 4. LDO Bias Line Regulation IO = 3 A Figure 5. LDO Dropout Voltage vs LDO Bias Voltage IO = 500 mA Figure 6. LDO Power-Supply Ripple Rejection vs LDO Dropout Voltage |
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