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TPS51513RHBT Datasheet(PDF) 4 Page - Texas Instruments

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Part No. TPS51513RHBT
Description  SINGLE PHASE, D-CAP SYNCHRONOUS BUCK CONTROLLER
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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TPS51513RHBT Datasheet(HTML) 4 Page - Texas Instruments

 
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TPS51513
SLUS956A – JUNE 2009 – REVISED FEBRUARY 2010
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
over recommended free-air temperature range, V5IN = V5FILT = 5.0V, GSNS = PGND = GND, VSNS = VCORE (Unless
otherwise noted).
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
CURRENT SENSE: OVERCURRENT, ZERO CROSSING AND VOLTAGE POSITIONING
ICS
CS input bias current
CSP and CSN
–1.0
1.0
mA
Zero crossing comp. internal
VZXOFF
CSP–CSN
–1.5
0.7
mV
offset
Droop amplifier
GM-DROOP
VSNS = 1 V
485
500
519
mS
transconductance
VDCLAMPN
Droop amplifier clamp voltage
VREF – VDROOP
46
mV
VDCLAMPP
Droop amplifier clamp voltage
VDROOP – VREF
600
mV
ACSINT
Internal current sense gain
Gain from CSP - CSN to modulator
5.92
6
6.06
V/V
TRIPSEL = GND; RSLEW tied to GND
10.1
11.4
12.8
TRIPSEL = REF; RSLEW tied to GND
12.9
14.0
15.4
TRIPSEL = 3.3 V; RSLEW tied to GND
16.1
17.4
18.8
TRIPSEL = V5FILT; RSLEW tied to GND
20.4
21.7
23.2
OCP voltage set
VOCPP
mV
(Valley current limit)
TRIPSEL = GND; RSLEW tied to VREF
25.1
26.7
28.5
TRIPSEL = REF; RSLEW tied to VREF
31.4
33.3
35.3
TRIPSEL = 3.3 V; RSLEW tied to VREF
39.2
41.5
43.8
TRIPSEL = V5FILT; RSLEW tied to VREF
50.4
53.1
55.7
TRIPSEL = GND; RsLEW tied to GND
14.0
15.6
17.4
TRIPSEL = REF; RSLEW tied to GND
17.2
19.0
20.4
TRIPSEL = 3.3 V; RSLEW tied to GND
21.3
23.1
24.6
TRIPSEL = V5FILT; RSLEW tied to GND
28.1
29.7
31.1
Negative OCP voltage set (valley
VOCPN
mV
current limit)
TRIPSEL = GND; RSLEW tied to VREF
34.5
36.3
38.0
TRIPSEL = REF; RSLEW tied to VREF
42.9
44.6
46.1
TRIPSEL = 3.3 V; RSLEW tied to VREF
54.3
56.2
57.9
TRIPSEL = V5FILT; RSLEW tied to VREF
67.6
69.4
71.2
DRIVERS: HIGH-SIDE, LOW-SIDE, CROSS CONDUCTION PREVENTION AND BOOST RECTIFIER
VBST – LL = 5 V, ‘HI’ State VBST – VDRVH =
0.9
2.5
0.1 V
RDRVH
DRVH on-resistance
VBST – LL = 5 V, ‘LO’ State VDRVH – VLL =
0.7
2.5
0.1 V
IDRVH
DRVH sink/source current(1)
DRVH forced to 2.5 V, VBST – LL forced to 5 V
2.2
A
DRVH 10% to 90% or 90% to 10%,
tDRVH
DRVH transition time
15
25
ns
CDRVH = 3 nF
‘HI’ State, V5IN – VDRVL = 0.1 V
0.7
2
RDRVL
DRVL on-resistance
‘LO’ State, VDRVL – PGND = 0.1 V
0.45
1
DRVL forced to 2.5 V, Source
2.7
A
IDRVL
DRVL Sink/Source current(1)
DRVL forced to 2.5 V, Sink
8
A
DRVL 90% to 10%, CDRVL = 3 nF
12
25
tDRVL
DRVL transition time
ns
DRVL 10% to 90%, CDRVL = 3 nF
12
25
LL falls to 1 V to DRVL rises to 1 V
15
19
25
tNONOVLP
Driver non-overlap time
ns
DRVL falls to 1 V to DRVH rises to 1 V
22
27
35
VFBST
BST rectifier forward voltage
V5IN – VBST, IF=5 mA, TA = 25°C
0.6
0.7
0.8
V
IBSTLK
BST rectifier leakage current
VVBST = 34 V, VLL=28 V
0.1
1
mA
(1)
Specified by design. Not production tested.
4
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