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TPS40140RHHT Datasheet(PDF) 58 Page - Texas Instruments

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Part No. TPS40140RHHT
Description  Dual or 2-Phase, Stackable Controller
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS40140RHHT Datasheet(HTML) 58 Page - Texas Instruments

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SW
3
1.058
R
1.33 (39.2 10
(f
)
7)
45.8 k
-
=
´
´
´
-
=
W
OUT
RIPPLE
SW
V
(1 D)
I
0.526
1.573 A
L f
´
-
=
´
=
´
TPS40140
SLUS660I – SEPTEMBER 2005 – REVISED JANUARY 2015
www.ti.com
(61)
With 356-
μF output capacitance, the ripple voltage at the capacitor is calculated to be 0.85 mV. In the
specification, the output ripple voltage should be less than 20 mV, so based on Equation 24, the required
maximum ESR is 12 m
Ω. The selected capacitors can reach this requirement.
9.3.1.2 Step 2: Input Capacitor Selection
The input voltage ripple depends on the input capacitance and the ESR. The minimum capacitor and the
maximum ESR can be estimated by Equation 25 and Equation 26 in the dual output design example.
For this design, assume VRIPPLE(CIN) is 50 mV and VRIPPLE(CinEST) is 30 mV, also each phase inductor ripple
current is 50%, so the calculated minimum capacitance is 23-
μF and the maximum ESR is 4.6 mΩ. In this case,
one 33-
μF 6.3-V SP-capacitor is placed on the mother board and each module has two 22-μF, 6.3-V ceramic
capacitors.
The maximum input ripple RMS current is calculated to be 2.57 A with the maximum input voltage based on
Equation 58. The selected capacitors are sufficient to meet this requirement.
9.3.1.3 Step 3: Peripheral Component Design
9.3.1.3.1
Master Module
9.3.1.3.1.1
Rt (Pin 5)
It is connected to GND with a resistor that sets the switching frequency.
(62)
Here, ƒsw represents the phase switching frequency. In the design, a 47-kΩ resistor is selected. The actual
switching frequency is 650 kHz.
9.3.1.3.1.2
COMP1 and COMP2 (Pin 35 and Pin 10)
COMP1 is connected to the compensator network.
COMP2 is directly tied to COMP1.
9.3.1.3.1.3
TRK1 and TRK2 (Pin 33 and Pin 12)
A soft start capacitor is connected between TRK1 and GND. TRK2 is directly tied to BP5 to set this channel as a
salve.
9.3.1.3.1.4
ILIM1 and ILIM2 (Pin 34 and Pin 11)
ILIM1 is connected to the resistor network that has the same design as the dual output example. The peak
current in Equation 42 and Equation 43 is the peak current of each phase.
ILIM2 is grounded.
9.3.1.3.1.5
FB1 and FB2 (Pin 36 and Pin 9)
FB1 is tied to the feedback network. FB2 is connected to GND.
9.3.1.3.1.6
PHSEL (Pin 4)
For this four phase configuration, the PHSEL pin is tied to GND with a 39-k
Ω resistor.
9.3.1.3.1.7
PGOOD1 and PGOOD2 (Pin 30 and Pin 15)
Both of PGOOD1 and PGOOD2 are tied to BP5 with a 10-k
Ω resistor.
9.3.1.3.1.8
CLKIO (Pin 28)
CLKIO is connected to the same pin in the salve module.
58
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Copyright © 2005–2015, Texas Instruments Incorporated
Product Folder Links: TPS40140


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