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TPS40140RHHT Datasheet(PDF) 33 Page - Texas Instruments |
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TPS40140RHHT Datasheet(HTML) 33 Page - Texas Instruments |
33 / 68 page R BIAS + 0.7 R1 V OUT * 0.7 COMP + RBIAS 0.7 V VFB VOUT UDG-05100 R1 + VOUT GSNS DIFFO 30 kW 30 kW 30 kW 30 kW − TPS40140 www.ti.com SLUS660I – SEPTEMBER 2005 – REVISED JANUARY 2015 9.1.9 Differential Amplifier, U9 The unity gain differential amplifier has high bandwidth to achieve improved regulation at user defined point of load and ease layout constrains. The output voltage is sensed between the VOUT and GSNS pins. The output voltage programming divider is connected to the output of the amplifier, the DIFFO pin. Figure 32. Differential Amplifier Configuration DESIGN HINT Because of the resistor configuration of the differential amplifier, the input impedance must be kept very low or errors result in setting the output voltage. 9.1.10 Setting the Output Voltage Two resistors, R1 and RBIAS sets the output voltage as shown in Figure 33. Figure 33. Setting the Output Voltage With RBIAS RBIAS is calculated in Equation 6. (6) 9.1.11 Programmable Input UVLO Protection A voltage divider that sets 2 V on the UVLO_CEx pins determines when the controller begins to operate. The internal regulators are enabled when the voltage on the UVLO_CEx pins exceeds 1 V, but switching commences when the voltage is 2 V. 9.1.12 CLKFLT, CLKIO Pin Fault If the CLKIO signal is to be distributed from the master to the slave controllers, and is not there, the slave controller enters a ‘Standby’ mode. The upper and lower MOSFETs are turned off but the internal 5-V regulator is still active and VREG is present. The CLKIO signal could be turned off at the master controller or the connection to the slave CLKIO input could be opened. If the CLKIO signal is restored, normal operation continues. Copyright © 2005–2015, Texas Instruments Incorporated Submit Documentation Feedback 33 Product Folder Links: TPS40140 |
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