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DS90C031B Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part No. DS90C031B
Description  LVDS Quad CMOS Differential Line Driver
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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DS90C031B Datasheet(HTML) 3 Page - National Semiconductor (TI)

 
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Switching Characteristics (Continued)
V
CC = +5.0V, TA = +25˚C (Notes 3, 6, 9)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHZ
Disable Time High to Z
R
L = 100Ω,CL =5pF
(
Figure 4 and Figure 5)
2.5
10
ns
t
PLZ
Disable Time Low to Z
2.5
10
ns
t
PZH
Enable Time Z to High
2.5
10
ns
t
PZL
Enable Time Z to Low
2.5
10
ns
Switching Characteristics
V
CC = +5.0V ± 10%,TA = −40˚C to +85˚C (Notes 3, 6, 9)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHLD
Differential Propagation Delay High to Low
R
L = 100Ω,CL =5pF
(
Figure 2 and Figure 3)
0.5
2.0
3.5
ns
t
PLHD
Differential Propagation Delay Low to High
0.5
2.1
3.5
ns
t
SKD
Differential Skew |t
PHLD –tPLHD|
0
80
900
ps
t
SK1
Channel-to-Channel Skew (Note 4)
0
0.3
1.0
ns
t
SK2
Chip to Chip Skew (Note 5)
3.0
ns
t
TLH
Rise Time
0.35
2.0
ns
t
THL
Fall Time
0.35
2.0
ns
t
PHZ
Disable Time High to Z
R
L = 100Ω,CL =5pF
(
Figure 4 and Figure 5)
2.5
15
ns
t
PLZ
Disable Time Low to Z
2.5
15
ns
t
PZH
Enable Time Z to High
2.5
15
ns
t
PZL
Enable Time Z to Low
2.5
15
ns
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: VOD1 and
∆VOD1.
Note 3: All typicals are given for: VCC = +5.0V, TA = +25˚C.
Note 4: Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in the same chip with an event
on the inputs.
Note 5: Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
Note 6: Generator waveform for all tests unless otherwise specified:f=1 MHz, ZO =50Ω,tr ≤ 6 ns, and tf ≤ 6 ns.
Note 7: ESD Ratings:
HBM (1.5 k
Ω, 100 pF) ≥ 2kV
EIAJ (0
Ω, 200 pF) ≥ 250V
Note 8: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
Note 9: CL includes probe and jig capacitance.
Parameter Measurement Information
DS100989-3
FIGURE 1. Driver V
OD and VOS Test Circuit
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