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TPS3702CX12DDCT Datasheet(PDF) 6 Page - Texas Instruments |
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TPS3702CX12DDCT Datasheet(HTML) 6 Page - Texas Instruments |
6 / 28 page VHYS UV tSD VDD VDD(min) SENSE V(POR) VIT+(OV) VIT±(OV) VIT+(UV) VIT±(UV) VHYS OV tpd(HL) tpd(HL) tpd(LH) tpd(LH) tSD tSD tSD tSD tSD Undefined Undefined Undefined Undefined TPS3702 SBVS251 – JANUARY 2015 www.ti.com 6.6 Timing Requirements At VDD = 2 V, 2.5% input overdrive (1) with R PU = 10 kΩ, VOH = 0.9 × VDD, and VOL = 400 mV, unless otherwise noted. RPU refers to the pull-up resistor at the UV and OV pins. MIN NOM MAX UNIT tpd(HL) High-to-low propagation delay(2) 19 µs tpd(LH) Low-to-high propagation delay(2) 35 µs tR Output rise time(3) 2.2 µs tF Output fall time(3) 0.22 µs tSD Startup delay(4) 300 µs (1) Overdrive = | (V(VDD) / VIT – 1) × 100% |. (2) High-to-low and low-to-high refers to the transition at the SENSE pin. (3) Output transitions from 10% to 90% for rise times and 90% to 10% for fall times. (4) During the power-on sequence, VDD must be at or above 2 V for at least tSD before the output is in the correct state. Figure 1. Timing Diagram 6 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3702 |
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