Electronic Components Datasheet Search |
|
OPA642P Datasheet(PDF) 8 Page - Texas Instruments |
|
OPA642P Datasheet(HTML) 8 Page - Texas Instruments |
8 / 16 page 8 ® OPA642 Gain, = 1 + V O V I R F R G V O 50 Ω –V S +V S 50 Ω Load V I OPA642 50 Ω R G 402 Ω R F 402 Ω 50 Ω Source 0.1µF 3 2 4 7 6 8 5 2.2µF + 2.2µF 0.1µF + 0.1µF 0.1µF BUFFERING HIGH PERFORMANCE ADC’S To achieve full performance from a high dynamic range A/D converter, considerable care must be exercised in the design of the input amplifier interface circuit. The example circuit on the front page shows a typical AC-coupled inter- face to a very high dynamic range converter. The frequency domain application allows the OPA642 to be operated in its most linear region, using a signal range which swings symmetrically around ground (0V). The 2Vp-p swing is then level-shifted through the blocking capacitor to a DC refer- ence level, which is created by a well-decoupled resistive divider off the converter’s internal reference voltages. To have a negligible effect on the rated spurious-free dynamic range (SFDR) of the converter, the amplifier’s SFDR should be at least 10dB greater. In the front page example, the insertion of the OPA642 has an immeasurable effect on the distortion of the ADS804, which achieves 80dB SFDR at 5MHz Nyquist input signal. To achieve the lowest possible distortion in the 8-pin SO-8 or DIP package, the addition of 0.1 µF decoupling capacitors on pins 5 and 8 is required. These are shown in Figure 1. Although pins 5 and 8 are internally connected to pins 4 and 7 respectively (the standard supply pins for 8-pin op amps), the additional capacitors help to decouple the package lead inductances and improve second harmonic suppression at 5MHz by approximately 4dB. The much shorter bond wires and supply leads of the SOT23-5 package give the best distortion performance while requiring only two power sup- ply connections. Successful application of the OPA642 for ADC buffering requires careful selection of the series resistor at the ampli- fier output, along with the additional shunt capacitor at the ADC input. To some extent, selection of this RC network will be determined empirically for each model of converter. Many high performance CMOS ADCs, like the ADS804, perform better with the shunt capacitor at the input pin. This capacitor provides a low source impedance for the transient currents produced by the sampling process. Improved SFDR is obtained by adding the capacitor, whose value is often recommended in the converter data sheet. The external capacitor, in combination with the built-in capacitance of the A/D input, presents a significant capacitive load to the OPA642. Without a series isolation resistor, the result could be undesirable peaking or loss of stability in the amplifier. Since the DC bias current of the CMOS A/D input is negligible, the resistor has no effect on overall gain or offset accuracy. Refer to the plot of “RS vs Capacitive Load” in the Typical Performance Curves to obtain a good starting value for the series resistor. This will ensure flat frequency re- sponse to the ADC input. Increasing the external capacitor value will allow the series resistor to be reduced or, keeping this resistor fixed, will band-limit the signal and reduce high frequency noise to the input of the converter. VIDEO LINE DRIVING Most video distribution systems are designed with 75 Ω series resistors to drive a matched 75 Ω cable. In order to deliver a net gain of 1 to the 75 Ω matched load, the amplifier FIGURE 1. Gain of +2, High Frequency Application and Characterization Circuit [P or U Package]. APPLICATIONS INFORMATION WIDEBAND VOLTAGE FEEDBACK OPERATION The OPA642’s combination of speed and dynamic range is easily achieved in a wide variety of application circuits, providing that simple principles of good design practice are observed. For example, good power supply decoupling, as shown in Figure 1, is essential to achieve the lowest possible harmonic distortion and smooth frequency response. Proper PC board layout and careful component selection will maxi- mize the performance of the OPA642 in all applications, as discussed in the remaining sections of this data sheet. Figure 1 shows the gain of +2 configuration used as the basis for most of the Typical Performance Curves. Most of the curves were characterized using signal sources with 50 Ω driving impedance, and with measurement equipment pre- senting 50 Ω shunt load impedance. In Figure 1, the 50Ω shunt resistor at the VI terminal matches the source imped- ance of the test generator, while the 50 Ω series resistor at the V O terminal provides a matching resistor for the measure- ment equipment load. Generally, data sheet specifications refer to the voltage swing at the output pin (VO in Figure 1). The 100 Ω load from the series and shunt matching resis- tances, combined with the 804 Ω total feedback network load, presents the OPA642 with an effective load of approxi- mately 90 Ω. |
Similar Part No. - OPA642P |
|
Similar Description - OPA642P |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |