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OPA640UB Datasheet(PDF) 8 Page - Texas Instruments |
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OPA640UB Datasheet(HTML) 8 Page - Texas Instruments |
8 / 14 page 8 OPA640 ® Points to Remember 1) Making use of all four power supply pins will lower the effective power supply impedance seen by the input and output stages. This will improve the AC performance in- cluding lower distortion. The lowest distortion is achieved when running separate traces to V S1 and VS2. Power supply bypassing with 0.01 µF and 2.2µF surface mount capacitors on the topside of the PC board is recommended. It is essential to keep the 0.01 µF capacitor very close to the power supply pins. Refer to the DEM-OPA64X data sheet for the recommended layout and component placements. 2) Whenever possible, use surface mount. Don’t use point- to-point wiring as the increase in wiring inductance will be detrimental to AC performance. However, if it must be used, very short, direct signal paths are required. The input signal ground return, the load ground return, and the power supply common should all be connected to the same physical point to eliminate ground loops, which can cause unwanted feed- back. 3) Surface mount on backside of PC Board. Good compo- nent selection is essential. Capacitors used in critical loca- tions should be a low inductance type with a high quality dielectric material. Likewise, diodes used in critical loca- tions should be Schottky barrier types, such as HP5082- 2835 for fast recovery and minimum charge storage. Ordi- nary diodes will not be suitable in RF circuits. 4) Whenever possible, solder the OPA640 directly into the PC board without using a socket. Sockets add parasitic capacitance and inductance, which can seriously degrade AC performance or produce oscillations. 5) Use a small feedback resistor (usually 25 Ω) in unity-gain voltage follower applications for the best performance. For gain configurations, resistors used in feedback networks should have values of a few hundred ohms for best perfor- mance. Shunt capacitance problems limit the acceptable resistance range to about 1k Ω on the high end and to a value that is within the amplifier’s output drive limits on the low end. Metal film and carbon resistors will be satisfactory, but wirewound resistors (even “non-inductive” types) are abso- lutely unacceptable in high-frequency circuits. Feedback resistors should be placed directly between the output and the inverting input on the backside of the PC board. This placement allows for the shortest feedback path and the highest bandwidth. Refer to the demonstration board layout at the end of the data sheet. A longer feedback path than this will decrease the realized bandwidth substantially. 6) Due to the extremely high bandwidth of the OPA640, the SO-8 package is strongly recommended due its low parasitic impedance. The parasitic impedance in the DIP and package causes the OPA640 to experience about 5dB of gain peaking in unity-gain configurations. This is compared with virtually no gain peaking in the SO-8 package in unity-gain. The gain peaking in the DIP package is minimized in gains of 2 or greater, however. Surface mount components (chip resistors, capacitors, etc.) have low lead inductance and are also strongly recommended. 7) Avoid overloading the output. Remember that output current must be provided by the amplifier to drive its own feedback network as well as to drive its load. Lowest distortion is achieved with high impedance loads. 8) Don’t forget that these amplifiers use ±5V supplies. Although they will operate perfectly well with +5V and –5.2V, use of ±15V supplies will destroy the part. 9) Standard commercial test equipment has not been de- signed to test devices in the OPA640’s speed range. Bench- top op amp testers and ATE systems will require a special test head to successfully test these amplifiers. 10) Terminate transmission line loads. Unterminated lines, such as coaxial cable, can appear to the amplifier to be a capacitive or inductive load. By terminating a transmission line with its characteristic impedance, the amplifier’s load then appears purely resistive. 11) Plug-in prototype boards and wire-wrap boards will not be satisfactory. A clean layout using RF techniques is essential; there are no shortcuts. OFFSET VOLTAGE ADJUSTMENT If additional offset adjustment is needed, the circuit in Figure 1 can be used without degrading offset drift with temperature. Avoid external adjustment whenever possible since extraneous noise, such as power supply noise, can be inadvertently coupled into the amplifier’s inverting input terminal. Remember that additional offset errors can be created by the amplifier’s input bias currents. Whenever possible, match the impedance seen by both inputs as is shown with R 3. This will reduce input bias current errors to the amplifier’s offset current. FIGURE 1. Offset Voltage Trim. NOTE: (1) R 3 is optional and can be used to cancel offset errors due to input bias currents. INPUT PROTECTION Static damage has been well recognized for MOSFET de- vices, but any semiconductor device deserves protection from this potentially damaging source. The OPA640 incor- porates on-chip ESD protection diodes as shown in Figure 2. R 2 OPA640 R 3 = R1 || R2 (1) R 1 R TRIM 47k Ω +V CC –V CC 20k Ω V IN or Ground Output Trim Range +V CC to –V CC ≅ R Trim R 2 R 2 R Trim 10µF |
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