10

OPA640

®

The OPA640’s output stage has been optimized to drive low

resistive loads. Capacitive loads, however, will decrease the

amplifier’s phase margin which may cause high frequency

peaking or oscillations. Capacitive loads greater than 2pF

should be buffered by connecting a small resistance, usually

5

Ω to 25Ω, in series with the output as shown in Figure 5.

This is particularly important when driving high capacitance

loads such as flash A/D converters. Increasing the gain from

+1 will improve the capacitive load drive due to increased

phase margin.

In general, capacitive loads should be minimized for opti-

the phase margin and avoid peaking by keeping the break

frequency of this zero sufficiently high. When high closed-

loop gains are required, a three-resistor attenuator (tee net-

work) is recommended to avoid using large value resistors

with large time constants.

SETTLING TIME

Settling time is defined as the total time required, from the

input signal step, for the output to settle to within the

specified error band around the final value. This error band

is expressed as a percentage of the value of the output

transition, a 2V step. Thus, settling time to 0.01% requires

an error band of

±200µV centered around the final value of

2V.

Settling time, specified in an inverting gain of one, occurs in

only 15ns to 0.01% for a 2V step, making the OPA640 one

of the fastest settling monolithic amplifiers commercially

available. Settling time increases with closed-loop gain and

output voltage change as described in the Typical Perform-

ance Curves. Preserving settling time requires critical atten-

tion to the details as mentioned under “Wiring Precautions.”

The amplifier also recovers quickly from input overloads.

Overload recovery time to linear operation from a 50%

overload is typically only 35ns.

In practice, settling time measurements on the OPA640

prove to be very difficult to perform. Accurate measurement

is next to impossible in all but the very best equipped labs.

Among other things, a fast flat-top generator and high speed

oscilloscope are needed. Unfortunately, fast flat-top genera-

tors, which settle to 0.01% in sufficient time, are scarce and

expensive. Fast oscilloscopes, however, are more commonly

available. For best results a sampling oscilloscope is recom-

mended. Sampling scopes typically have bandwidths that

are greater than 1GHz and very low capacitance inputs.

They also exhibit faster settling times in response to signals

that would tend to overload a real-time oscilloscope.

DIFFERENTIAL GAIN AND PHASE

Differential Gain (DG) and Differential Phase (DP) are

among the more important specifications for video applica-

tions. DG is defined as the percent change in closed-loop

gain over a specified change in output voltage level. DP is

defined as the change in degrees of the closed-loop phase

over the same output voltage change. Both DG and DP are

specified at the NTSC sub-carrier frequency of 3.58MHz.

DG and DP increase with closed-loop gain and output

voltage transition as shown in the Typical Performance

Curves. All measurements were performed using a Tektronix

model VM700 Video Measurement Set.

FIGURE 5. Driving Capacitive Loads.

OPA640

C

L

R

L

R

S

(R

mum high frequency performance. Coax lines can be driven

if the cable is properly terminated. The capacitance of coax

cable (29pF/foot for RG-58) will not load the amplifier

when the coaxial cable or transmission line is terminated in

its characteristic impedance.

COMPENSATION

The OPA640 is internally compensated and is stable in unity

gain with a phase margin of approximately 60

°. However,

the unity gain buffer is the most demanding circuit configu-

ration for loop stability and oscillations are most likely to

occur in this gain. If possible, use the device in a noise gain

of two or greater to improve phase margin and reduce the

susceptibility to oscillation. (Note that, from a stability

standpoint, an inverting gain of –1V/V is equivalent to a

noise gain of 2.) Gain and phase response for other gains are

shown in the Typical Performance Curves.

The high-frequency response of the OPA640 in a good

layout is very flat with frequency. However, some circuit

configurations such as those where large feedback resis-

tances are used, can produce high-frequency gain peaking.

This peaking can be minimized by connecting a small

capacitor in parallel with the feedback resistor. This capaci-

tor compensates for the closed-loop, high frequency, transfer

function zero that results from the time constant formed by

the input capacitance of the amplifier (typically 2pF after PC

board mounting), and the input and feedback resistors. The

selected compensation capacitor may be a trimmer, a fixed

capacitor, or a planned PC board capacitance. The capaci-

tance value is strongly dependent on circuit layout and

closed-loop gain. Using small resistor values will preserve