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ONET1131EC Datasheet(PDF) 6 Page - Texas Instruments |
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ONET1131EC Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 46 page  6 ONET1131EC SLLSEQ6 – SEPTEMBER 2016 www.ti.com Product Folder Links: ONET1131EC Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.4 Thermal Information THERMAL METRIC(1) RSM (VQFN) UNIT 32 PINS RθJA Junction-to-ambient thermal resistance 37.2 °C/W RθJCtop Junction-to-case (top) thermal resistance 30.1 °C/W RθJB Junction-to-board thermal resistance 7.8 °C/W ψJT Junction-to-top characterization parameter 0.4 °C/W ψJB Junction-to-board characterization parameter 7.6 °C/W RθJCbot Junction-to-case (bottom) thermal resistance 2.4 °C/W (1) The bias current can be set below the specified minimum according to the corresponding register setting; however, in closed loop operation settings below the specified value may trigger a fault. 6.5 DC Electrical Characteristics Over recommended operating conditions, open loop operation, VOUT = 2 VPP single-ended, I(BIAS) = 80 mA, unless otherwise noted. Typical operating condition is at VCC = 2.5 V and TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VCC Supply voltage 2.37 2.5 2.63 V IVCC Supply current in single-ended TX mode with CDRs enabled TXMODE = 1, TXCDR_DIS = 0, TX VOUT = 2 VPP single-ended, I(BIAS) = 0 mA 158 193 mA Power dissipation in single-ended TX mode with CDRs enabled 380 508 mW Supply current in differential TX mode with CDRs enabled TXMODE = 0, TXCDR_DIS = 0, TX VOUT = 2 VPP single-ended, I(BIAS) = 0 mA 197 237 mA Power dissipation in differential TX mode with CDRs enabled 493 623 mW Supply current in single-ended TX mode with CDRs disabled TXMODE = 1, TXCDR_DIS = 1, TX VOUT = 2 VPP single-ended, I(BIAS) = 0 mA 119 193 mA Power dissipation in single-ended TX mode with CDRs disabled 298 376 mW Supply current in differential TX mode with CDRs disabled TXMODE = 0, TXCDR_DIS = 1, TX VOUT = 2 VPP single-ended, I(BIAS) = 0 mA; 164 200 mA Power dissipation in differential TX mode with CDRs disabled 410 526 mW R(IN) Data input resistance Differential between DIN+ / DIN– 100 Ω Data input termination mismatch 5% R(OUT) Ooutput resistance Single-ended at OUT+ or OUT– 60 Ω Digital input current DIS pull up to VCC –20 20 µA VOH Digital output high voltage LOL, FLT pull-up to VCC, ISOURCE = 37.5 μA 2.1 V VOL Digital output low voltage LOL, FLT pull-up to VCC, ISINK = 350 μA 0.4 V I(BIAS-MIN) Minimum bias current See (1) 5 mA I(BIAS-MAX) Maximum bias current Source. BIASPOL = 0, DAC set to maximum, open and closed loop 145 150 mA Sink. BIASPOL = 1, DAC set to maximum, open and closed loop 95 100 mA I(BIAS-DIS) Bias current during disable 100 µA Average power stability APC loop enabled ±0.5 dB Bias pin compliance voltage Source. TXBIASPOL = 0 VCC - 0.45 V Sink. TXBIASPOL = 1 0.45 V Temperature sensor accuracy With 1-point external mid-scale calibration ±3 °C |
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